NEC IE-78K0-NS-P04 Preliminary User'S Manual Download

Page: 31 / 64

IE-78K0-NS-P04, IE-780828-NS-EM4

Jumper JP1

Table 3-17: User RESET mode

Jumper

JP2

Table 3-18: DCAN Out Transmit Buffer Selection

Jumper Position

DCAN out

Function

(1-2)

Pin emulator

Reserved

(2-3)

FPGA

DCAN transmit line from FPGA via transistor to probe (

default

)

Jumper

JP3

Table 3-19: DCAN in Buffer Type Selection

Jumper

Position

DCAN in

Function

(1-2)

Pin emulator

Original buffer (

default

)

(2-3)

FPGA

Buffer type different /timing optimized (limitation USRV

≥

4.5 V)

Jumper JP4

Table 3-20: Stepper Motor Power Selection

Jumper JP5

Table 3-21: Stepper Motor Power Selection

Jumper Position

Stepper Motor Power

Function

Open

SMV

External power supply via SMV

pin(

default

)

Closed

USRV

Internal power supply

Jumper Position

User RESET

Function

(1-2)

To probe

User Reset (IE) connected to the probe (

default

)

(2-3)

Pull-up

User Reset (IE) pull-up by resistor (10K)

Jumper Position

Stepper Motor Power

Function

(1-2)

SMV

External power supply via SMV

pin(

default

)

(2-3)

Internal power supply

Summary of Contents for IE-78K0-NS-P04

Page 1: ...ary User s Manual IE 780828 NS EM4 Emulation Board and Probe Board NEC Corporation 2000 Document No U14502EE2V0UM00 Date Published June 2000 IE 78K0 NS P04 for IE 78K0 NS A Target device µPD780828B A Subseries ...

Page 2: ...ed to take appropriate countermeasures under his responsibility Caution This equipment should be handled like a CMOS semiconductor device The user must take all precautions to avoid build up of static electricity while working with this equipment All test and measurement tools including the workbench must be grounded The user operator must be grounded using the wrist strap The In Circuit Emulator ...

Page 3: ...nsibility of customer NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information While NEC endeavours to enhance the quality reliability and safety of NEC semiconductor products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to ...

Page 4: ...uesseldorf Germany Tel 0211 65 03 02 Fax 0211 65 03 490 NEC Electronics UK Ltd Milton Keynes UK Tel 01908 691 133 Fax 01908 670 290 NEC Electronics Italiana s r l Milano Italy Tel 02 66 75 41 Fax 02 66 75 42 99 NEC Electronics Germany GmbH Benelux Office Eindhoven The Netherlands Tel 040 2445845 Fax 040 2444580 NEC Electronics France S A Vélizy Villacoublay France Tel 01 30 67 58 00 Fax 01 30 67 5...

Page 5: ...ughly familiar with the target device s functions and use methods and to be knowledgeable about debugging Organization When using the IE 78K0 NS P04 and the IE 780828 NS EM4 refer not only to this manual supplied with the IE 780828 NS EM4 but also the manual that is supplied with the IE 78K0 NS A Basic specifications General System configuration Parts names Part names External interface functions ...

Page 6: ...Term Meaning Emulation device This is a general term that refers to the device in the emulator that is used to emulate the target device It includes the emulation CPU Emulation CPU This is the CPU block in the emulator that is used to execute user generated programs Target device This is a device a µPD780828B A Subseries chip that is the target for emulation Target system This includes the target ...

Page 7: ...ock Selections 34 3 2 3 Subsystem Clock 35 3 2 4 Main system clock settings 35 3 2 5 Examples of Main System Clock Setting 40 3 3 Subsystem Clock Setting 41 3 4 LCD Resistor Network 42 3 5 Jumper Settings 43 3 6 External Trigger 44 Chapter 4 Differences among Target Devices and Target Interface Circuits 46 4 1 Input Output Signals 47 4 2 Differences in Port Functions 51 4 3 Differences in SFR Regi...

Page 8: ...tem Clock Oscillation Circuit 33 Figure 3 7 When Using Clock That Is Already Mounted on Emulation Board 34 Figure 3 8 When Using User mounted Clock 34 Figure 3 9 When Using an External Clock 35 Figure 3 10 Connections on Parts Board 36 Figure 3 11 IE 78K0 NS A side Emulation Device 37 Figure 3 12 Crystal Oscillator 38 Figure 3 13 Pin Alignment of Crystal Oscillator and Socket 38 Figure 3 14 IE 78K...

Page 9: ...ble 3 11 FPGA Mode Selection 28 Table 3 12 JTAG Mode 28 Table 3 13 Reference Voltage Setting 28 Table 3 14 Reference Voltage Setting 29 Table 3 15 Future Function 29 Table 3 16 LED Indicator D1 D2 D3 29 Table 3 17 User RESET mode 31 Table 3 18 DCAN Out Transmit Buffer Selection 31 Table 3 19 DCAN in Buffer Type Selection 31 Table 3 20 Stepper Motor Power Selection 31 Table 3 21 Stepper Motor Power...

Page 10: ...10 IE 78K0 NS P04 IE 780828 NS EM4 MEMO ...

Page 11: ...ools for efficient debugging of hardware or software when using one of the following target devices that belong to the 78K 0 Series of 8 bit single chip microcontrollers This chapter describes the emulation board s and probe board s system configuration and basic specifications Target device µPD780828B A Subseries ...

Page 12: ...RD Cable IE 70000 CD IF A Debugger ID78K0 NS Device file FPGA Data Control software Host machine PC 9800 Series or IBM PC AT compatibles Interface board IE 70000 98 IF C Interface board or Interface card Interface cable Interface cable NS IF Cable In circuit emulator IE 78K0 NS P04 IE 780828 NS EM4 AC adapter Emulation probe Conversion socket conversion adapter Interface board IE 70000 PC IF C IE ...

Page 13: ... plastic QFP GC 8BT type NP 80GC TQ NQPACK080SB YQPACK080SB HQPACK080SB YQSOCKET080SBF The NP 80GC TQ is a product of Naito Densei Machidaseisakusho Co Ltd The sockets are products of TOKYO ELETECH CORPORATION Note The packages emulation probes and conversion sockets conversion adapters are listed below ...

Page 14: ...NS P04 IE 780828 NS EM4 s position in the basic hardware con figuration Figure 1 2 Basic Hardware Configuration IE 78K0 NS A IE 78K0 NS P04 IE 780828 NS EM4 Emulation probe Dedicated bus interface IE system Host machine Interface board 78K0 Emulator Emulation board This product Interface card ...

Page 15: ...ns are listed in Table 1 1 Table 1 1 Basic Specifications Parameter Description Target device µPD780828B A Subseries System clock Main system clock 8 38 MHz Subsystem clock not available on device Clock supply External Pulse input Internal Mounted on emulation board Voltage support 4 0 to 5 5 V same as target device ...

Page 16: ... When carrying out target device emulation using the IE 78K0 NS P04 and IE 780828 NS EM4 in conjunction with the IE 78K0 NS A there are certain differences from the operation of the actual device see Differences from Target Device 3 The target system VDD must be between 4 0 V and 5 5 V 4 Power on sequence 1 Power on IE 78K0 NS A 2 Power on target hardware 3 Start debugger ID78K0 NS 5 Power off seq...

Page 17: ...17 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 18: ...se check that all these items are included in the package 1 IE 78K0 NS P04 x 1 2 Parts holder with cover x 2 3 Registration Card x 1 4 Readme First x 1 5 List of Contents x 1 IE 780828 NS EM4 Components The IE 780828 NS EM4 comprises the following components Please check that all these items are included in the package 1 IE 780828 NS EM4 x 1 2 LCD split resistor network x 1 3 Screws Set x 1 4 Regi...

Page 19: ...19 IE 78K0 NS P04 IE 780828 NS EM4 2 2 Parts of the IE 78K0 NS P04 Figure 2 1 IE 78K0 NS P04 External View and Part Names Main system clock fix 8 00 MHz Main system clock user defined ...

Page 20: ...20 IE 78K0 NS P04 IE 780828 NS EM4 2 3 Parts of the IE 780828 NS EM4 Figure 2 2 IE 780828 NS EM4 External View and Part Names External trigger EXT OUT EXT IN Emulation probe connector CN11 USER VDD LED ...

Page 21: ...or CN8 JP1 Disconnect USER Reset CN9 JP2 CAN TxD driver buffer type CN10 Probe board connectors IE 78K0 NS P04 JP3 CAN RxD receive buffer type CN11 CN12 CN13 CN14 CN15 CN16 CN17 CN18 Test connector only for internal use by NEC JP1 Analog reference voltage JP2 GND pin of A D Converter JP3 Reseved only for internal use by NEC JP4 JTAG mode selection only for internal use by NEC JP5 FPGA mode selecti...

Page 22: ...22 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 23: ...emulation probe Installation of the IE 78K0 NS P04 Installation of the IE 780828 NS EM4 Installation of the emulation probe Setting of the jumpers for the clock selection The power supply of the IE 78K0 NS A and the target system must be switched off when connect ing or disconnecting any item Caution Usage of incorrect connection methods may damage the IE system ...

Page 24: ... Remove the screws on the option board G 78K0H and remove the option board Figure 3 1 IE 78K0 NS A inside 3 Setup the jumper s on the main board G 780009 It is necessary to set some jumpers on the main board for the clock selection An example for the jumper setting will be given in the chapter clock setting Option Board G 78K0H Main board G 780009 ...

Page 25: ...lash ROM Mode Jumper JP3 Table 3 2 Internal Mode 1 Jumper Position Function 1 2 Internal use 2 3 Internal use default Jumper Position Function 1 2 Internal use default 2 3 Internal use Figure 3 2 Main Board G 780009 Jumper Positioning JP8 JP6 JP7 JP4 JP3 JP2 ...

Page 26: ...osition Function 1 2 Not selectable 3 4 EM1 P04 board selection default 5 6 EM4 board selection Jumper JP8 Table 3 6 Sub Clock Selection Jumper Position Function 1 2 Main board selection default 3 4 EM board selection 1 5 6 EM board selection 2 Jumper Position Function 1 2 On EM board default 3 4 On target system 5 6 On main board 4 Connect the option board G 78K0H to the main board G 780009 5 Set...

Page 27: ...er Position AAVREF Function Open Target Connected to target selected reference voltage default Close GND Reference voltage Remark Close jumper JP1 when the AD converter is not used Jumper JP2 Table 3 8 Ground Voltage Pin of AD Converter Jumper Position AAVSS Function Open Target Connected to target selected ground base default Close GND Internal digital ground Remark Close jumper JP2 when the AD c...

Page 28: ...ved Internal use default Jumper JP5 Table 3 11 FPGA Mode Selection Jumper Position ESN Function Open Pull up Asynchronous peripheral mode FPGA s are loaded by IE default Close GND Reserved Internal use Jumper JP6 Table 3 12 JTAG Mode Jumper Position JTAG Function 1 2 Pull up Reserved Internal use 2 3 GND Reserved Internal use default Jumper JP7 Table 3 13 Reference Voltage Setting Jumper Position ...

Page 29: ... µPD780828B A series has internal split resistors for the LCD voltage level Therefor the LCD split resistor network delivered with IE 780828 NS EM4 has to be connected to SO1 of the IE 78K0 NS P04 LED Indicator Table 3 16 LED Indicator D1 D2 D3 LED Condition Function LED1 green Blinking FPGA download ongoing LED1 green On FPGA download complete LED1 green Off FPGA not programmed LED2 yellow Blinki...

Page 30: ...78K0H 7 When user clock as main clock is used the main system clock can be mounted by using a parts holder or a crystal oscillator see chapter clock setting 8 Setup of the probe board IE 780828 NS EM4 Figure 3 4 Emulation Board IE 780828 NS EM4 Jumper Positioning JP4 JP3 JP2 JP1 JP5 NEC IE 780828 NS EM4 ...

Page 31: ... 2 3 FPGA Buffer type different timing optimized limitation USRVDD 4 5 V Jumper JP4 Table 3 20 Stepper Motor Power Selection Jumper JP5 Table 3 21 Stepper Motor Power Selection Jumper Position Stepper Motor Power Function Open SMVDD External power supply via SMVDD pin default Closed USRVDD Internal power supply Jumper Position User RESET Function 1 2 To probe User Reset IE connected to the probe d...

Page 32: ... top and the bottom plate by removing the screws 11 Connect the probe NP 80GC TQ to CN11 of the probe board IE 780828 NS EM4 12 Connect the cover and tighten the 4 screws Figure 3 5 Connection of Boards Emulation Board IE 78K0 NS P04 Emulation probe NP 80GC TQ Option Board G 78K0H Probe Board IE 780828 NS EM4 Main board G 780009 ...

Page 33: ...nd uses the target device s internal oscillation circuit An example of an external circuit is shown in part a of Figure 3 2 During emulation the oscillator that is mounted on the target system is not used Instead it uses the clock that is mounted on the emulation board which is installed for the IE 78K0 NS A If the target system includes an external clock select 3 External clock An external clock ...

Page 34: ...ble to mount any clock supported by the set specifications on the IE 78K0 NS P04 First mount the oscillator on the parts holder then attach the parts board to the IE 78K0 NS P04 This method is useful when using a different frequency from that of the pre mounted clock Figure 3 8 When Using User mounted Clock Remark The clock that is supplied by the IE 78K0 NS P04 oscillator encircled in the figure ...

Page 35: ...k Other than 8 0000 MHz Shortcut 6 8 External Caution When using an an user defined clock or external clock open the configuration dialog when starting the integrated debugger ID78K0 NS and select External in the area Clock for selecting the CPU s clock source this selects the user s clock Remark The IE 78K0 NS P04 factory settings are those listed above under when using clock that is already moun...

Page 36: ...0 NS P04 Capacitor CA Ceramic oscillator or crystal resonator Capacitor CB Resistor Rx Solder kit Steps 1 Solder onto the supplied parts board as shown below the target ceramic oscillator or crystal resonator resistor Rx capacitor CA and capacitor CB all with suitable oscillation frequency Figure 3 10 Connections on Parts Board Remark The sections enclosed in broken lines indicate parts that are a...

Page 37: ... board mounted in the X2 socket on the emulation board is wired as shown in Figure 3 10 above 6 Install the IE 78K0 NS P04 and the IE 780828 NS EM4 in the IE 78K0 NS A The above steps configure a circuit and enable clock output to be supplied from the mounted oscillator to the emulation device Remark The sections enclosed in broken lines indicate parts that are attached to the parts holder Figure ...

Page 38: ...nect the parts board from 2 above to the socket X2 from which the parts holder was removed Insert the crystal oscillator into the socket so as to align the pins as shown in the figure below Figure 3 13 Pin Alignment of Crystal Oscillator and Socket 4 Install the IE 78K0 NS P04 and the IE 780828 NS EM4 in the IE 78K0 NS A Crystal Oscillator Pin Name Socket Pin No NC 1 GND 7 CLOCK OUT 8 VCC 14 NC GN...

Page 39: ...equired for this situation Make sure that the parts holder with a shortcut between 6 and 8 is in the socket marked X2 When starting the integrated debugger ID78K0 NS open the configuration dialog and select External in the area Clock for selecting the CPU s clock source this selects the user s clock Figure 3 14 IE 78K0 NS A side Emulation Device VHC157 A Y B X1 VCC IE 78K0 NS A side Emulation devi...

Page 40: ...d X2 with shortcut between 6 8 ID78K0 NS Internal 2 Clock mounted by the User on the Emulation Board User related Clock Main Board JP6 3 4 JP7 1 2 Emulation Board X2 with parts holder and crystal resonator ceramic resonator or crystal oscillator ID78K0 NS External 3 External Clock on the Target Hardware Main Board JP6 3 4 JP7 1 2 Emulation Board X2 with shortcut between 6 8 ID78K0 NS External ...

Page 41: ...41 IE 78K0 NS P04 IE 780828 NS EM4 3 3 Subsystem Clock Setting The IE 78K0 NS P04 supports the using of a subclock for the emulation But this function is not supported by the µPD780828B A series ...

Page 42: ...Network In order to use the LCD during the emulation it is necessary to connect the resistor network delivered with the IE 780828 NS EM4 to the socket SO1 on the IE 78K0 NS P04 Figure 3 15 LCD split resistor Network 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 ...

Page 43: ...s as shown below Table 3 23 Jumper Settings on IE 78K0 NS A JP2 JP3 JP4 JP6 JP7 JP8 Short 2 3 1 2 1 2 3 4 1 2 3 4 Table 3 24 Jumper Settings on IE 78K0 NS P04 Table 3 25 Jumper Settings on IE 780828 NS EM4 JP1 JP2 JP3 JP4 JP5 1 2 2 3 1 2 1 2 Open JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 Open Open Open Closed Open 2 3 1 2 1 2 Open ...

Page 44: ...trigger connect the IE 780828 NS EM4 s check pin EXTOUT and EXTIN as shown below See the in circuit emulator IE 78K0 NS A User s Manual for description of related use methods and pin characteristics Figure 3 16 External Trigger Input Position CN11 EXT OUT EXT IN External trigger ...

Page 45: ...45 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 46: ... the target device is a CMOS circuit the IE 78K0 NS P04 IE 780828 NS EM4 s target interface circuit consists of an emulation chip TTL CMOS IC and other components When connected the IE system with the target system for debugging the IE system performs emulation so as to operate as the actual target device would operate on the target system However some minor differences exist since the operations ...

Page 47: ...circuit is used as follows for above mentioned signals 1 Signals which are input or output from the gate array P00 to P03 P10 ANI0 to P14 ANI4 P34 to P37 P40 to P47 P61 to P65 P80 to P87 P90 to P97 AVDD AVREF AVSS CRxD 2 Signals those are input or output from the µPD78P0308 S0 to S27 COM0 to COM4 VLCD 3 Signals that are input or output from the µPD780009 emulation CPU X1 RESET 4 Other signals P20 ...

Page 48: ...quivalent Circuit 1 from Emulation Circuit P00 to P03 AVSS P10 AN50 to P14 AN54 AVDD AVREF CRxD P61 to P65 P34 to P37 MUX P40 to P47 MUX P80 to P87 MUX P90 to P97 MUX Emulation Data Array µPD78P0308 VLCD COM0 to COM3 VDD VSS Probe IE 78K0 NS A side ...

Page 49: ...C0 VCC1 VDD0 VDD1 Probe IE 78K0 NS A side 100 Ω 4 7 KΩ µPD78009 Emulation CPU FPGA P ch N ch P ch N ch 2SK1697 N ch MOS FET 2SJ278 P ch MOS FET 2SJ278 P ch MOS FET 2SK1697 N ch MOS FET µPC393 Internal circuit P ch N ch 2SJ278 P ch MOS FET 2SK1697 N ch MOS FET 100 Ω 1 MΩ 0 1 µF CTxD P ch N ch 2SJ278 P ch MOS FET 2SK1697 N ch MOS FET ...

Page 50: ...50 IE 78K0 NS P04 IE 780828 NS EM4 Figure 4 3 Equivalent Circuit 3 from Emulation Circuit SMVDD SMVSS Probe IE 78K0 NS A side Internal connected Internal connected X2 VPP Test Open Open ...

Page 51: ... the same operations as the target device performed in the IE 78K0 NS A It comprises the emulation device and various dates CMOS TTL and othes ICs When debugging is performed with the target system connected to the IE 78K0 NS A the IE 78K0 NS A target interface circuit performes emulation as though the actual target device were operating in the target system The target device has a CMOS LSI config...

Page 52: ...52 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 53: ...t 80 mA 250 mA Note For the device output current see the data sheet 4 Sound Generator Since an external transistor is used for the output driver the electrical specifications of driver capability vary as follows Table 5 2 Output Current of P61 SGO effective value Device ICE High level output current 20 mA 150 mA Low level output current 20 mA 250 mA Note For the device output current see the data...

Page 54: ...54 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 55: ...onnectors CN2 CN6 IE 78K0 NS P04 CN3 CN7 CN4 Emulator connections CN8 CN5 CN9 CN6 CN10 CN7 CN11 Probe connector CN8 JP1 Disconnect USER Reset CN9 JP2 CAN TxD driver buffer type CN10 Probe board connectors IE 78K0 NS P04 JP3 CAN RxD receive buffer type CN11 JP4 Choose stepper motor power CN12 JP5 Choose stepper motor power CN13 CN14 CN15 CN16 CN17 CN18 Test connector only for internal use by NEC JP...

Page 56: ...56 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 57: ...dapter Package Drawings and recommended Board Mounting Pattern The following sockets and socket adapters are available for the connection of the probe or device Soldering socket NQPACK080SB Probe adapter YQPACK080SB High adapter YQSOCKET080SB F Device Lid HQPACK080SB ...

Page 58: ... 0 15 0 19 7 0 776 0 591 0 591 0 776 0 65 0 02 x 19 12 35 0 05 0 65 0 02 x 19 12 35 0 05 0 001 0 002 0 003 0 002 0 001 0 002 0 003 0 002 2 Pad drawing in mm Dimensions of mount pad for EV 9200 and that for target device QFP may be different in some parts For the recommended mount pad dimensions for QFP refer to SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL C10535E Caution ...

Page 59: ...59 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 60: ...7 SM31_P50 A8 SM31 P50 28 SM32_P51 A9 SM32 P51 29 SW 26 S26 SCK3 P35 30 SW 25 S25 SO3 P36 31 NC05 32 NC06 33 NC07 34 NC08 35 Reset 36 NC09 37 GND AVSS 38 NC10 39 GND07 40 GND08 41 ACHSP4 1 SGOA PCL P61 42 ACHSP4 0 SGO SGOF P60 43 AANI 0 ANI0 P10 44 AANI 1 ANI1 P11 45 ACHSP4 3 TxD0 P63 WR_ 46 ACHSP4 3 RxD0 P62 RD_ 47 AANI 2 AN12 P12 48 AANI 3 ANI3 P13 49 ACHSP4 5 TI21 P65 WAIT 50 ACHSP4 4 TI20 P64 ...

Page 61: ...P81 S14 86 NC12 87 NC13 88 NC14 89 NC15 90 NC16 91 SM23_P26 SM23 P26 92 SM24_P27 SM24 P27 93 SW 24 S24 S13 P37 94 SW 23 S23 TI22 P90 95 GND15 96 GND16 97 SM21_P24 SM21 P4 98 SM22_P25 SM22 P25 99 SW 22 S22 TIO51 P91 100 SW 21 S21 TPO P92 101 SM13_P22 SM13 P22 102 SM14_P23 SM14 P23 103 SW 20 S20 P93 104 SW 19 S19 P94 105 SM11_P20 SM11 P20 106 SM12_P21 SM12 P21 107 SW 18 S18 P95 108 SW 17 S17 P96 109...

Page 62: ...62 IE 78K0 NS P04 IE 780828 NS EM4 Memo ...

Page 63: ... 02 2719 5951 Address North America NEC Electronics Inc Corporate Communications Dept Fax 1 800 729 9288 1 408 588 6130 Europe NEC Electronics Europe GmbH Technical Documentation Dept Fax 49 211 6503 274 South America NEC do Brasil S A Fax 55 11 6465 6829 Asian Nations except Philippines NEC Electronics Singapore Pte Ltd Fax 65 250 3583 Japan NEC Semiconductor Technical Hotline Fax 044 548 7900 I ...

Page 64: ......

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