NEC Electronics (Europe) GmbH
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To connect the devices VDD pins to the VDD lane of the board place a 0 Ohm resistor on the SMD2 pad and place
a 100 nF buffering capacitor on the SMD1 pad.
Fx3 pinning
Signal
FE3 FF3 FG3 FJ3 FK3
VDD
4 9 9 9 9
VDD1
n/a n/a n/a n/a 126
AVREF0
1 1 1 1 1
AVREF1
n/a n/a n/a n/a 45
33 31 34 34 47
n/a
n/a 5 5 5
EVDD
n/a n/a n/a n/a 77
BVDD
n/a n/a 70 104 128
Table 6-2
VDD signal connection
6.2.2 REGC
pin
A buffering capacitor between the devices REGC pin(s) and VSS should be placed. Assemble the capacitor to the
SMD1 pad field.
VDD
VSS
C
Device
signal
Figure 6-6
REGC pin components
Refer to the Fx3 User’s Manual and Table 6-3 for the location of the RECC pin on the different devices.
Fx3 pinning
Signal
FE3 FF3 FG3 FJ3 FK3
REGC
5 10 10 10 10
REGC1
n/a n/a n/a n/a 125
Table 6-3
REGC signal connection
