CHAPTER 4 SETTING METHODS
4.4 Watchdog
Timer
Setting
The WDTM register is used to select the operation clock for the watchdog timer and the overflow time.
In this sample program, the watchdog timer is not used for program loop detection, so the WDTM register is set as
described in
, mentioned later.
Caution The operation clock and overflow time for the watchdog timer must be set during the initial
settings.
Figure 4-2. Format of Watchdog Timer Mode Register (WDTM)
WDTM
0 1 1
WDCS
4
WDCS
3
WDCS
2
WDCS
1
WDCS
0
Overflow time setting
Note 1
During low-speed
internal oscillation
clock operation
During system clock
operation
0 0 0
2
11
/f
RL
2
13
/f
X
0 0 1
2
12
/f
RL
2
14
/f
X
Notes 1.
When “Watchdog timer operation stop” is selected, the overflow time setting is invalid (don’t care).
2.
To stop watchdog timer operation or to use the system clock as the watchdog timer operation clock, the
option byte must be used to set to “Oscillation is stopped by software setting (LSRSTOP bit is set to 1)”.
For details, refer to
.
Caution Bits 7, 6, and 5 must be set to 0, 1, and 1, respectively.
Remark
x: don’t care
0 1 0
2
13
/f
RL
2
15
/f
X
0 1 1
2
14
/f
RL
2
16
/f
X
1 0 0
2
15
/f
RL
2
17
/f
X
1 0 1
2
16
/f
RL
2
18
/f
X
1 1 0
2
17
/f
RL
2
19
/f
X
1 1 1
2
18
/f
RL
2
20
/f
X
Operation clock selection
Note 2
0
0 Low-speed internal oscillation clock (f
RL
)
0 1
System
clock
(f
X
)
1
x Watchdog timer operation stop
Application Note U18752EJ2V0AN
14
