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FGRW (240):
An I/O read instruction on this address gets a new 16-bit data value from the FiFo. Use only
16-bit accesses to read from this port. The internal read address pointer inside the FiFo is
automatically incremented, so you can make use of the very efficient string I/O instructions of
the 80386 and higher (REP INSW). The contents of the FiFo remain stored, so you can read
them as many times as you want.
An I/O write instruction stores data in the FiFo. The internal write address pointer inside the
FiFo is automatically incremented, so you can make use of the efficient string I/O instructions
of the 80386 and higher (REP OUTSW).
FGINT (242):
A write on this address loads the frame counter with the lower 3 bits of the data word and
starts an integration period. The integration time can thus have 8 different values:
0
=
2 x 40 ms
=
80 ms
1
=
4 x 40 ms
=
160 ms
2
=
8 x 40 ms
=
320 ms
3
=
16 x 40 ms
=
640 ms
4
=
32 x 40 ms
=
1280 ms
5
=
64 x 40 ms
=
2560 ms
6
=
128 x 40 ms =
5120 ms
7
=
256 x 40 ms =
10240 ms
A read on this address retrieves the status of the Accumulating Framegrabber in bit 0 of the
data word. Right after writing to FGINT, this bit 0 goes to zero. Shortly after this, the bit 0
goes to zero, thus indicating the begin of the integration time. At the end of the integration
time, bit 0 goes to zero again.
FGRES (244):
A write to this address resets the write address pointer of the FiFo, a read on this address
resets the read address pointer of the FiFo. Between two consecutive reset commands there
should be a minimum of 2 read or write commands, respectively.
FGTHR (246):
A write to this address sets the discriminator threshold. The allowed values range from 0 to
255.