500 WATT RADIOBEACON TRANSMITTER
ND2000A-02x-xx0
Page 2-8
15 January 2005
Figure 2-1 Simplified Schematic of Pulse-Width Differential Amplifier
2.5.9.7 Linear
Attenuator:
The linear attenuator
circuit contains operational amplifier U7A, unity gain
amplifier U7B, transistors Q2/Q4 and their associated
components. U7A and Q4 form a diode to ground
circuit which results in a bias voltage of
approximately 0.6 volts DC being applied to the
emitter of Q2. Normally the
VSWR cutback
input at
J2-1, which is applied to U7B's non-inverting input, is
0 volts. U7B's output will be 0 volts and Q2 will be
reverse biased (turned off). The linear attenuator
circuit will present high impedance between the audio
signal and ground. When a positive voltage
VSWR
cutback
input is applied, U7B's output will be positive
and forward bias Q2 (turn it on). The impedance of
the linear attenuator circuit will decrease in proportion
to the current flow through Q2. The attenuation factor
will vary in proportion to the positive voltage level of
the
VSWR cutback
input.
2.5.9.8 Variable Pulse-Width Generator:
The
variable pulse-width generator circuit is a differential
amplifier that compares the linear sawtooth waveform
from the ramp integrator with the linear attenuated
audio and produces a nominal 70 kHz rectangular
waveform as its pulse-width modulation output. The
circuit comprises operational amplifier U9A,
transistors Q5, Q6 and their associated components.
They are configured to form an emitter coupled
differential amplifier. A portion of the audio and DC
signal is applied to the non-inverting input of U9A
from the wiper of
O/P POWER
potentiometer R48.
Unity gain buffer amplifier applies this voltage to the
base of Q6. The sawtooth waveform from U9A is
applied to the base of Q5. Refer to figure 2-1 for a
simplified schematic of the differential amplifier.
2.5.9.9
For explanation purposes, assume the
audio signal is a DC reference voltage that does not
contain an audio component. When the sawtooth
waveform is less positive than the DC reference
voltage, Q5 will be reverse biased and Q6 will be
forward biased. When the sawtooth waveform is
more positive than the DC reference voltage, Q6 will
be reverse biased and Q5 will be forward biased. The
output at the collector of Q6 will be approximately
zero volts DC when Q6 is forward biased and +15
volts DC when it is reverse biased.
The forward/reverse bias ratio of Q6 is determined by
the audio level. When audio is superimposed on the
DC reference voltage, the input applied to the base of
Q6 will go more or less positive at the audio rate. The
magnitude of the change will be determined by the
audio component's polarity and amplitude. When it is
less positive, Q6 will be reverse biased for a longer
portion of the sawtooth waveform. When it is more
positive, Q6 will be reverse biased for a shorter
portion of the sawtooth waveform. When audio is
present, the resulting pulse-width modulated output, at
the collector of Q6, is a varying width, rectangular
waveform at the square wave generator's repetition
rate (nominally 70 kHz).
2.5.9.10 Balanced
Drive:
The balanced drive is a
switching circuit that is driven by the variable pulse-
width modulation output of the variable pulse-width
generator. The circuit contains buffer amplifier
U10A, transistors Q7 and Q8 and their associated
components. The pulse-width modulated signal is
inverted by buffer amplifier U10A. Transistors Q7
and Q8 turn on and off at the PWM switching
frequency. The switching action of transistors Q7/Q8
