National LMH6517 User Manual Download Page 18

SP16160CH1RB Reference Design Board User’s Guide 

 

 

- 18 -  

www.national.com 

 

Program  the  LMK04031B  with  the  PIC  Loader 
board set with Switch 1 = ON, Switch 2 = OFF 

Perform the following changes to modify the board for 

differential CMOS clock

 

Remove R171, C174, C176 and C177 

 

Populate  R152,  R153,  R159  and  R160  with  0 
ohm, 0402 resistors 

 

Populate  C172  and  C173  with  0.1uF,  0402 
capacitors 

 

This 

mode 

requires 

programming 

the 

LMK04031B via the CodeLoader software 

Perform the following changes to modify the board for 
an 

External signal generator clock source

 

Remove R171, C174, C176 and C177 

 

Populate  R151  and  R158  with  0  ohm,  0402 
resistors 

 

Populate  T4  with  a  MA/COM  MABA007159  or 
equivalent transformer 

 

Populate  C172  and  C173  with  20pF,  0402 
capacitors 

 

Populate C174 with a 5 pF, 0402 capacitor 

 

Populate SMA_CLK with a SMA connector 

 

Provide  a  low-jitter,  +18  dBm  sinusoidal  signal 
through a bandpass filter. 

9.3 Varactor Controlled Crystal Oscillator 

Very  low-jitter  clock  performance  is  in-part  achieved 
by  using  low  noise  oscillators  for  the  frequency 
reference  and  VCXO.  The  reference  board  comes 
standard  with  Crystek  CCHD-950  and  CVHD-950 
model  oscillator  modules  that  achieve  low  noise 
performance  with  -162  dBc/Hz  broadband  phase 
noise.  Low  phase  noise  comes  with  an  associated 
high cost. 

A  lower  cost  solution  is  achieved  for  this  reference 
board  design  with  a  varactor  controlled  crystal  at  the 
expense  of  lower  noise  performance  at  high  input 
signal  frequencies  due  to  jitter.  This  circuit  can  be 
installed on the back side of the board to replace the 
VCXO module. 

Please  contact  National  Semiconductor  for  more 
information  on  configuring  the  reference  board  if  this 
option is desired.  

9.4 Bypassed Switching Regulators 

LM2734  Switching  regulators  are  utilized  in  this 
reference  board  design  to  minimize  LDO  regulator 
losses for the high current ADC supplies.  

Noise  on  the  supplies,  especially  the  sensitive  1.8  V 
analog  supply  to the ADC, can cause a performance 
degradation  in  the  form  of  small  spurs  offset  ~500 
kHz  from  a  large  input  tone  as  shown  in  Figure  21. 
These  spurs  may  be  insignificant  in  many 
applications  but  can  be  reduced  further  if  needed  by 
reducing  the  supply  ripple  at  the  output  of  the 
switching  regulators  or  eliminated  completely  by 
bypassing the switching regulators. 

 

Bypassing the switching regulators reduces the noise 
on  the  ADC  supplies  at  the  expense  of  expending 
more  power  in  the  LDO  regulators.  Perform  the 
following changes to bypass the switching regulators. 

 

Remove the resistor jumpers on L22 and L24. 

 

Remove R212 and R232. 

 

Populate  R211  and  R231  with  0805  0  ohm 
resistors.  

-115

-110

-105

-100

-95

-90

M

a

g

n

it

u

d

e

 [

d

B

F

S

]

Figure 22:  The on-board switching regulators 

can cause small spurious tones offset ~500 

kHz from a large input signal 

Summary of Contents for LMH6517

Page 1: ...B User s Guide 1 0 Reference Board Overview 2 2 0 Evaluation Kit Contents 4 3 0 System Description 4 4 0 Data Capture 5 5 0 Quick Start 5 6 0 Functional Description 7 7 0 System Performance 11 8 0 Dev...

Page 2: ...160CH1RB board front side SMA_AMP_I In Phase Analog Input ADC 16DV160 VCXO 76 8 MHz Reference Crystal Oscillator 61 44 MHz LMK 04031B Low Noise Regulators H3 uWire Header LMH 6517 JP1 FutureBus Connec...

Page 3: ...SP16160CH1RB Reference Design Board User s Guide 3 www national com Figure 2 SP16160CH1RB board back side Switching Regulators Varactor Controlled Crystal XO Optional...

Page 4: ...ples per second analog to digital converter ADC with parallel LVDS outputs LMH6517 A high performance dual channel digitally controlled variable gain amplifier DVGA with a 31 5 dB gain range in 0 5 dB...

Page 5: ...ition hardware through the FutureBus connector schematic reference designator H4 The SP16160CH1RB is compatible with National Semiconductor s WaveVision 5 1 Signal Path Digital Interface Board and ass...

Page 6: ...hould have a jumper installed on the main board to provide power to the PIC microcontroller board Lastly flip the switches on the PIC microcontroller board to the following positions Switch 1 ON Switc...

Page 7: ...e ADC input to full scale without compressing at the supply rails Ripple in the passband is easily kept below 1 dB The equivalent noise bandwidth ENBW of this filter is approximately 44 MHz Filter com...

Page 8: ...trolled oscillator VCO and a distribution stage The first PLL locks an external voltage controlled crystal oscillator VCXO to an incoming reference clock and filters the phase noise of the reference T...

Page 9: ...FutureBus connector on the edge of the reference board to the data capture hardware The data is clocked out of the ADC using the DRDY signal with a dual date rate DDR such that the even bits of both c...

Page 10: ...201 Frequency MHz Magnitude dBFS Ch I Average 1dBFS Ch I Average 3dBFS Ch I Average 6dBFS Ch Q Average 1dBFS Ch Q Average 3dBFS Ch Q Average 6dBFS Figure 10 Typical SFDR performance vs input signal f...

Page 11: ...iasing filter is 20 MHz considered here as the bandwidth with 0 5 dB ripple but the effective noise bandwidth is 44 MHz due to the gradual roll off of the filter profile Noise from the DVGA passes thr...

Page 12: ...eference Design Board User s Guide 12 www national com a b IM3 H3 H2 Figure 12 Typical FFT plot for a a 192 MHz 1 dBFS input signal and b 194 MHz two tone composite signal with 1 MHz spacing and 7 dBF...

Page 13: ...enuation of the ladder attenuator from 0 dB value 0 to 31 5 dB value 64 The ADC16DV160 can only be programmed via SPI but the LMH6517 can operate in multiple modes These modes include a Serial Mode in...

Page 14: ...uencies may also require loop filter changes for optimal jitter performance In the default hardware configuration 153 6 MHz is the only possible clock frequency due to the narrowband SAW filter in the...

Page 15: ...SP16160CH1RB Reference Design Board User s Guide 15 www national com Figure 16 LMK04031 CodeLoader configuration Bits Pins tab Figure 17 LMK04031B CodeLoader configuration PLL1 tab...

Page 16: ...18 may result in degraded performance of the reference board Figure 19 LMK04031B CodeLoader configuration Clock Outputs tab The LMK04031B clock outputs are not easily accessible on the SP16160CH1RB r...

Page 17: ...R7 located on the back side by the FutureBus Connector Figure 20 Orientation of the DIP switches that control the DVGA gain Part Sw Description 1 Latch active high 2 DVGA Enable active high 3 Gain 0...

Page 18: ...t A lower cost solution is achieved for this reference board design with a varactor controlled crystal at the expense of lower noise performance at high input signal frequencies due to jitter This cir...

Page 19: ...3 2 83 93 0 1 2 3 2 4 5 6 17 893 2 83 93 0 1 2 3 2 4 5 6 17 893 2 83 93 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2...

Page 20: ...3 3 6 6 7 5 3 5 5 5 6 5 6 75 6 75 6 7 7 43 43 6 6 4 4 5 4 5 4 5 5 3 3 57 57 6 6 55 4 55 4 6 6 6 6 5 6 5 6 7 6 7 6 6 6 4 4 77 6 77 6 4 4 5 5 3 3 6 6 7 4 7 4 0 5 0 5 6 6 6 6 6 9 6 6 6 6 3 6 6 6 6 9 8 8...

Page 21: ...1 893 2 2 3 93 0 1 2 3 2 4 5 6 17 A 1 B 1 893 2 2 3 93 0 1 2 3 2 4 5 6 17 A 1 B 1 893 2 2 3 93 2 2 D 3 03 D 3 03 2 E 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 D C D C 2 2 D 3 03 D 3 03 2 E 2 2 D D 2 2 2 2 12 2...

Page 22: ...83 93 7 888888888888888888888888888888888888888888888888888888888888888 4 9 4 A 9 B A454 6 9 C D A454 1 1 7 3 3 8 0 1 3 E 1 3 3 0 F 0 0 0 3 2 2 F F 2 2 D F F F F 316 316 2 2 2 2 2 2 2 2 D D 2 2 2 2 2...

Page 23: ...SP16160CH1RB Reference Design Board User s Guide 23 www national com 11 0 Layout Figure 27 Layer 1 Signal...

Page 24: ...SP16160CH1RB Reference Design Board User s Guide 24 www national com Figure 28 Layer 2 Ground...

Page 25: ...SP16160CH1RB Reference Design Board User s Guide 25 www national com Figure 29 Layer 3 Ground...

Page 26: ...SP16160CH1RB Reference Design Board User s Guide 26 www national com Figure 30 Layer 4 Power...

Page 27: ...SP16160CH1RB Reference Design Board User s Guide 27 www national com Figure 31 Layer 5 Ground...

Page 28: ...SP16160CH1RB Reference Design Board User s Guide 28 www national com Figure 32 Layer 6 Signal...

Page 29: ...Digi Key P10JCT ND 0 0810 10 0 81 30 2 R45 R50 24 9 RES 24 9 OHM 1 16W 1 0402 SMD smd_size0402 Panasonic ECG Digi Key P24 9LCT ND 0 0980 10 0 20 31 1 R171 49 9 RES 49 9 OHM 1 16W 1 0402 SMD smd_size0...

Page 30: ...As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly...

Page 31: ...or use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have...

Page 32: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments SP16160CH1RBKIT NOPB...

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