Glossary
©
National Instruments Corporation
G-7
P
PCI
Peripheral Component Interconnect. The PCI bus is a high-performance
32-bit or 64-bit bus with multiplexed address and data lines.
PCMCIA
Personal Computer Memory Card International Association
POSC
Power-On Self Configuration. A process by which the MITE chip programs
its own registers from EEPROMs at power up
R
Resource Manager
a message-based Commander located at Logical Address 0, which provides
configuration management services such as address map configuration,
Commander and Servant mappings, and self-test and diagnostic
management
RMS
Root mean squared.
See
g
rms
.
S
s
seconds
SCSI
Small Computer System Interface (bus)
SIMM
Single In-line Memory Module
slave
a functional part of a VME/VXIbus device that detects data transfer cycles
initiated by a VMEbus master and responds to the transfers when the
address specifies one of the device
’
s registers
Slot 0 device
a device configured for installation in Slot 0 of a VXIbus mainframe. This
device is unique in the VXIbus system in that it performs the VXI/VMEbus
System Controller functions, including clock sourcing and arbitration for
data transfers across the backplane. Installing such a device into any other
slot can damage the device, the VXIbus backplane, or both.
SMB
Sub Miniature Type B connector that features a snap coupling for fast
connection
Summary of Contents for VXIpc-870
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