National Instruments sbRIO-9651, Design Manual, Page: 18 / 76

© National Instruments | 1-7
NI sbRIO-9651 System on Module Carrier Board Design Guide
Reference Schematic Design Considerations
Table 1-7 lists design considerations for the schematic shown in Figure 1-2.
USB1 Host Signal Definitions
Table 1-8 describes the USB1 Host port pins and signals on the sbRIO-9651 SOM connector.
Table 1-7. USB0 Device Reference Schematic Design Considerations
Consideration Notes
USB data pair • The USB0_DP and USB0_DN data pair is routed differentially to the
USB connector.
• On the reference carrier board, the L2 common-mode choke is not
populated, but you can populate it in your design to help with
conducted immunity or emissions.
• If you choose to populate L2, remove R76 and R78 from your design.
• If your design does not include a common-mode choke, you can route
the USB pair directly from the USB connector to the sbRIO-9651
SOM connector.
• U17 provides ESD protection to the USB data pair and should be
placed close to the USB connector.
USB0_MODE The USB0_MODE signal is pulled up to 3.3 V to select USB Device
functionality.
USB0_CPEN Leave the USB0_CPEN signal disconnected for a USB Device port.
USB0_VBUS • For the USB Device port to function properly, the USB0_VBUS signal
must be connected to the VBUS pin on the USB connector.
• This is a low-current, voltage-sense connection.
• In layout, you can treat this connection as a data signal.
• R66 helps provide some overvoltage protection on USB0_VBUS and
should be placed close to the USB connector. NI recommends that you
use a 1 k
Ω resistor.
Table 1-8. USB1 Host Signal Definitions
Signal Name
Dedicated
SOM Pin # Direction
*
I/O
Standard Description
USB1_DP 35 I/O Defined by
USB
specification. USB1 data pair.
USB1_DN 43