Summary of Contents for PXIe-7867R

Page 1: ...PXIe 7867...

Page 2: ...ew The following high level block diagram represents the NI PXIe 7867R Figure 1 NI PXIe 7867R Block Diagram Device Temperature NI ASIC Kintex 7 FPGA Flash Memory DIO CONNECTOR 0 RMIO CONNECTOR 1 RDIO...

Page 3: ...23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 CONNECTOR 2 RAO TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 DIO30 GND...

Page 4: ...manuals for more information Connectivity Options Use the following connection accessories and cables to access the signals on the I O connectors Table 2 Connection Accessories and Cables Connector T...

Page 5: ...e specified range Figure 2 Connecting Referenced Single Ended Signals to the NI PXIe 7867R PGIA ADC AI NI PXIe 7867R Connection Accessory AISENSE AIGND V1 Overvoltage Protection AI Overvoltage Protect...

Page 6: ...on To connect floating differential signals to the NI PXIe 7867R you must connect the negative and positive signals to AI GND through 1 M resistors to keep the voltage within the common mode voltage r...

Page 7: ...up to 80 MHz signal frequencies Each connector has a fixed logic level of 3 3 V You can configure each channel as input or output Figure 7 Connecting to the DIO Channels NI PXIe 7867R Power FPGA Conne...

Page 8: ...ions to minimize noise pickup and maximize measurement accuracy Use differential AI connections to reject common mode noise Use individually shielded twisted pair wires to connect AI signals to the de...

Page 9: ...located around the world For telephone support in the United States create your service request at ni com support or dial 1 866 ASK MYNI 275 6964 For telephone support outside the United States visit...

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