Table 2. PXIe-6674T Active LED Status Colors
Active LED Color
Status
Off
The 10 MHz PLL is not in use and no errors are present.
Green
The 10 MHz PLL is active and locked.
Solid Amber
The user can set the Active LED to amber through software.
Solid Red
10 MHz PLL is attempting to lock to the reference supplied on CLKIN.
Connectors
This section describes the connectors on the front panel of the PXIe-6674T.
•
CLKIN—AC coupled, 50 Ω clock input. CLK IN can be routed directly to
PXI_CLK10_IN, to the 10 MHz PLL, to PXIe_DSTARA, or to the FPGA for use as a
synchronization clock.
•
CLKOUT—AC couple clock output. CLKOUT can be sourced from the OCXO, PXI-
CLK10, Clock Generation, or from the PXIe-DSTARA network.
•
PFI<0...5>/PFI)LVDS<0...2>—Programmable Function Interface which can be
individually configured for either single ended operation or LVDS operation. In LVDS
mode, the connectors are paired and can be programmatically set as either inputs or
outputs, but not both simultaneously.
on page 9 for a diagram showing the locations of these connections on the
PXIe-6674T front panel.
Caution
Connections that exceed any of the maximum ratings of input or output
signals on the PXIe-6674T can damage the module and the computer. NI is not
liable for any damage resulting from such signal connections.
Hardware Features
The PXIe-6674T performs two broad functions:
•
Generating clock and trigger signals.
•
Routing internally or externally generated signals from one location to another.
on page 12 outlines the function and direction of the signals discussed in detail in the
remainder of this chapter:
PXIe-6674T User Manual
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© National Instruments
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