© National Instruments
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3-5
Figure 3-2.
Delta-Sigma ADC Modulator Noise Power Spectrum
Low Pass FIR Filter
The effect of the modulator noise shaping can be seen above 1.25 MHz. The digital filter
removes as much of the modulator noise as possible while still allowing sufficient bandwidth to
capture the signal of interest. To illustrate the importance of this, if the digital filter is bypassed
(as was done to obtain the modulator noise power spectrum in Figure 3-2), a 400 ns rise time for
a 0 V to 10 V step input can be obtained, but the data will have an effective number of bits
(ENOB) of 4.2 bits, which makes the acquisition nearly worthless.
The PXIe-4480/4481 can be programmed with a symmetric FIR filter with up to 36 coefficients.
Users can design their own filter and, using the NI-DAQmx Channel Property Node, program it
to the PXIe-4480/4481. It is required that the filter have the following characteristics:
•
Have between 1 and 36 coefficients. Filters larger than 36 coefficients are not allowed due
to hardware limitations.
•
The filter must be symmetric. This means that a filter with N coefficients must have the first
N/2 coefficients match the value of the last N/2 coefficients, but in reverse order. Thus, the
first coefficient must be the same value as the last coefficient, the second coefficient must
be the same value as the second to last coefficient, and so on. Filters with an odd number
of coefficients will have a single coefficient in the middle that does not have a first half/
second half match.
•
Coefficients must be in the range of 1 to -1.
•
The sum of all coefficients should equal (or be very close to) 1. Failure to follow this rule
will cause gain errors and in the worst case may result in the DSP math done by the FPGA
overflowing and returning invalid data.
Noi
s
e (dB)
–40
–120
–110
–100
–90
–
8
0
–70
–60
–50
Fre
qu
ency (MHz)
10
0
1
2
3
4
5
6
7
8
9