Chapter 2
Hardware Overview of the NI 78xxR
©
National Instruments Corporation
2-23
R Series Multifunction RIO User Manual
Figure 2-12.
PXI Star Trigger Connections in a PXI Chassis
Refer to the
PXI Hardware Specification Revision 2.1
and
PXI Software
Specification Revision 2.1
at
www.pxi
s
a.org
for more information abo
u
t
PXI triggers.
Switch Settings (NI 781
x
R/783
x
R Only)
Refer to Fig
u
re 2-13 for the location of switches on the NI PCI-781
x
R and
Fig
u
re 2-14 for the location of switches on the NI PXI-781
x
R. Refer
to Fig
u
re 2-15 for the location of switches on the NI PCI-783
x
R and
Fig
u
re 2-16 for the location of switches on the NI PXI-783
x
R. For normal
operation, SW1 is in the OFF position. To prevent a VI stored in Flash
memory from loading to the FPGA at power
u
p, move SW1 to the
ON position, as shown in Fig
u
re 2-17.
Note
SW2 and SW3 are not connected.
1
S
h
a
red Loc
a
l B
us
Line
s
b
etween
S
lot 2
a
nd
S
lot
3
2
S
h
a
red Trigger Line
s
b
etween
S
lot 2,
S
lot
3
,
a
nd
S
lot 4
3 S
h
a
red Loc
a
l B
us
Line
s
b
etween
S
lot
3
a
nd
S
lot 4
Lbr0
Lbr1
Lbr2
Lbr3
PXI_Star*
Slot 2
Lbl0
Lbl1
Lbl2
Lbl3
Lbr0
Lbr1
Lbr2
Lbr3
PXI_Star
Slot 3
Lbl0
Lbl1
Lbl2
Lbl3
Lbr0
Lbr1
Lbr2
Lbr3
PXI_Star
Slot 4
3
1
2
* A Slot 2 device ties the PXI_Star Line to the PXI 10 MHz clock
Lbl0
Lbl1
Lbl2
Lbl3
T
rigger 0
T
rigger 1
T
rigger 2
T
rigger 3
T
rigger 0
T
rigger 1
T
rigger 2
T
rigger 3
T
rigger 0
T
rigger 1
T
rigger 2
T
rigger 3
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