National Instruments PCIe-6323, User Manual

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X Series User Manual
DO Sample Clock Timebase Signal
The DO Sample Clock Timebase (do/SampleClockTimebase) signal is divided down to provide
a source for DO Sample Clock. You can route any of the following signals to be the DO Sample
Clock Timebase signal:
• 100 MHz Timebase (default)
• 20 MHz Timebase
• 100 kHz Timebase
• PXI_CLK10
• PFI <0..15>
• RTSI <0..7>
• PXI_STAR
• PXIe_DSTAR<A,B>
• Analog Comparison Event (an analog trigger)
DO Sample Clock Timebase is not available as an output on the I/O connector.
You might use DO Sample Clock Timebase if you want to use an external sample clock signal,
but need to divide the signal down. If you want to use an external sample clock signal, but do
not need to divide the signal, then you should use DO Sample Clock rather than DO Sample
Clock Timebase.
DO Start Trigger Signal
Use the DO Start Trigger (do/StartTrigger) signal to initiate a waveform generation. If you do
not use triggers, you can begin a generation with a software command.
Retriggerable DO
The DO Start Trigger is configurable as retriggerable. When DO Start Trigger is configured as
retriggerable, the timing engine generates the sample clocks for the configured generation in
response to each pulse on a DO Start Trigger signal.
The timing engine ignores the DO Start Trigger signal while the clock generation is in progress.
After the clock generation is finished, the timing engine waits for another start trigger to begin
another clock generation. Figure 6-8 shows a retriggerable DO of four samples.
Figure 6-8.
Retriggerable DO
DO S t a rt Trigger
DO Sa mple Clock