National Instruments PCIe-6323, User Manual

Page: 116 / 278

6-6
|
ni.com
Chapter 6 Digital I/O
stop it once a finite acquisition completes. When using the DI timing engine, you can also
specify a configurable delay from DI Start Trigger to the first DI Sample Clock pulse.
By default, this delay is set to two ticks of the DI Sample Clock Timebase signal.
Figure 6-3. DI Sample Clock and DI Start Trigger
DI Sample Clock Timebase Signal
You can route any of the following signals to be the DI Sample Clock Timebase
(di/SampleClockTimebase) signal:
• 100 MHz Timebase (default)
• 20 MHz Timebase
• 100 kHz Timebase
• PXI_CLK10
• RTSI <0..7>
• PFI <0..15>
• PXI_STAR
• PXIe_DSTAR<A,B>
• Analog Comparison Event (an analog trigger)
Refer to the device routing table in MAX for all additional routable signals. To find the device
routing table for your device, launch MAX and select
Devices and Interfaces»NI-DAQmx
Devices . Click a device to open a tabbed window in the middle pane. Click the Device Routes
tab at the bottom of the pane to display the device routing table.
DI Sample Clock Timebase is not available as an output on the I/O connector. DI Sample Clock
Timebase is divided down to provide one of the possible sources for DI Sample Clock. You can
configure the polarity selection for DI Sample Clock Timebase as either rising or falling edge
except for the 100 MHz Timebase or 20 MHz Timebase.
You might use DI Sample Clock Timebase if you want to use an external sample clock signal,
but need to divide the signal down. If you want to use an external sample clock signal, but do
DI Sa mple Clock Time bas e
DI S t a rt Trigger
DI Sa mple Clock
Del a y
From
S t a rt
Trigger