Chapter 3
Hardware Overview
NI PXI-6682 Series User Manual
3-10
ni.com
Figure 3-4.
High-Level Schematic of NI PXI-6682 Signal Routing Architecture
Note
The NI PXI-6682H architecture is identical to the architecture described in
Figure 3-4, except that it doesn’t have the PXI_STAR trigger lines, CLKIN, or
PXI_CLK10_IN.
Determining Sources and Destinations
All signal routing operations can be characterized by a
source
(input) and
a
destination
. In addition, synchronous routing operations must also define
a third signal known as the
synchronization clock
. Refer to the
section for more information on synchronous versus
asynchronous routing.
Table 3-6 summarizes the sources and destinations of the
NI PXI-6682 Series. The destinations are listed in the horizontal heading
row, and the sources are listed in the column at the far left. A
in a cell
PXI_Trig 0
PXI_Trig 7
PXI_Star 0
PXI_Star 12
Router for each I/O
PFI 0
PFI 2
PXI_Trig 0
PXI_Trig 7
PXI_Star 0
PXI_Star 12
GND
Clk10
Synchronizer
TCXO
ClkIn
ClkOut
PXI_Clk10_In
PXI_Clk10
PFI 0
PFI 2
PXI_Clk10
Not in PXI-6682H
Not in PXI-6682H
