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Chapter 5
Counters
Routing Counter
n
Z Signal to an Output Terminal
You can route Counter
n
Z out to any PFI terminal.
Counter
n
Up_Down Signal
Counter
n
Up_Down is another name for the Counter
n
B signal.
Counter
n
HW Arm Signal
The Counter
n
HW Arm signal enables a counter to begin an input or output function.
To begin any counter input or output function, you must first enable, or arm, the counter. In some
applications, such as a buffered edge count, the counter begins counting when it is armed. In
other applications, such as single pulse-width measurement, the counter begins waiting for the
Gate signal when it is armed. Counter output operations can use the arm signal in addition to a
start trigger.
Software can arm a counter or configure counters to be armed on a hardware signal. Software
calls this hardware signal the Arm Start Trigger. Internally, software routes the Arm Start Trigger
to the Counter
n
HW Arm input of the counter.
Routing Signals to Counter
n
HW Arm Input
Any of the following signals can be routed to the Counter
n
HW Arm input:
•
Any PFI terminal
•
AI Reference Trigger
•
AI Start Trigger
•
Analog Comparison Event
•
Change Detection Event
A counter’s Internal Output can be routed to a different counter’s HW Arm.
Some of these options may not be available in some driver software. Refer to the
Device Routing
in MAX
topic in the
NI-DAQmx Help
or the
LabVIEW Help
for more information about available
routing options.
Counter
n
Sample Clock Signal
Use the Counter
n
Sample Clock (Ctr
n
SampleClock) signal to perform sample clocked
acquisitions and generations.
You can specify an internal or external source for Counter
n
Sample Clock. You also can specify
whether the measurement sample begins on the rising edge or falling edge of Counter
n
Sample
Clock.
If the cDAQ chassis receives a Counter
n
Sample Clock when the FIFO is full, it reports an
overflow error to the host software.
