National Instruments NI 9752, User Manual

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The circuit output to the RIO FPGA reverses the polarity of the input by going low when the
input voltage is greater than 2.0 V. The output goes high when the input is less than 1.0 V.
Figure 11 shows the standard configuration of the Hall-effect sensor input circuits.
Figure 11. Hall-Effect Circuit Input Configuration
Standard Circuit Configuration
The NI 9752 comes with a standard configuration as illustrated in Table 1 below.
Table 1. Standard Analog Configuration
Channel
Pull-up
Resistor
Pull-down
Resistor
Divide
Resistor
Break
Frequency Intended Use
1 open 1 k Ω 5.6 k 200 Hz 33 V Measurement
2 open 1 k Ω 5.6 k 200 Hz 33 V Measurement
3 open 1 k Ω 5.6 k Ω 200 Hz 33 V Measurement
4 open 51 k Ω 0 Ω 500 Hz Active/Pot
5 open 51 k Ω 0 Ω 500 Hz Active/Pot
6 open 51 k Ω 0 Ω 500 Hz Active/Pot
7 open 51 k Ω 0 Ω 500 Hz Active/Pot
8 open 51 k Ω 0 Ω 500 Hz Active/Pot
9 open 51 k Ω 0 Ω 500 Hz Active/Pot
10 open 51 k Ω 0 Ω 500 Hz Active/Pot