
Glossary
G-6
ni.com
mask
The bits that are significant for pattern detection, also applies to change
detection.
MSB
most significant bit
0
open collector
Output driver that drives its output pin to 0 V for logic low, but puts the pin
in the high-impedance state for logic high.
P
pattern I/O
Data-transfer mode in which NI 653
X
transfers data on the falling or rising
edge of a TTL signal, typically at a constant rate.
PCI
Peripheral Component Interconnect—A high-performance expansion bus
architecture originally developed by Intel to replace ISA and EISA. It has
achieved widespread acceptance as a standard for PCs and workstations; it
offers a theoretical maximum transfer rate of 132 MB/s.
PCLK
See
PCMCIA
An expansion bus architecture that has found widespread acceptance as a
de facto standard in notebook-sized computers. It originated as a
specification for add-on memory cards written by the Personal Computer
Memory Card International Association.
peripheral device
Any external device connected to the NI 653
X
that the NI 653
X
controls,
monitors, tests, or with which it communicates.
PLL
phase lock loop
Plug and Play ISA
A specification prepared by Microsoft, Intel, and other PC-related
companies that will result in PCs with plug-in boards that can be fully
configured in software, without jumpers or switches on the devices.
port
A collection of lines, usually eight.
posttrigger
Acquiring data that occurs after a trigger.
PPI
programmable peripheral interface
pretrigger
Acquiring data that occurs before a trigger.
Summary of Contents for NI 653 Series
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