National Instruments NI 6514 Manual Download

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Summary of Contents for NI 6514

Page 1: ...erutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In st...

Page 2: ...vel Programmer Manual for NI 6509 651x 6520 6521 and 6528 Devices Static DIO Register Level Programmer Manual November 2005 371580A 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 8...

Page 3: ...3 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 095 783 68 51 S...

Page 4: ...fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic...

Page 5: ...2 6 Falling Edge Sensitivity Configuration Registers 2 7 FallEdgeEnable N 2 7 Filter Enable Registers 2 8 FilterEnable N 2 8 Watchdog Timers High Impedance Registers 2 9 WatchdogHighImp N 2 9 Watchdog...

Page 6: ...se when Watchdog Timer Expires 2 25 RTSI Trigger for Watchdog Timer 2 26 RTSI Edge Detection Configuration Register 2 27 Chapter 3 Programming Programming Examples 3 1 Using Interrupts and Other Advan...

Page 7: ...lication development software such as LabVIEW Measurement Studio for Visual Studio NET or LabWindows CVI you do not need to read this manual Note While it is possible to program your DAQ device at the...

Page 8: ...ons The terminal block and cable assembly installation guides or accessory board user manuals explain how to physically connect the relevant pieces of your system DAQ Getting Started Guide Conventions...

Page 9: ...text that is a placeholder for a word or value that you must supply monospace Text in this font denotes sections of code programming examples and syntax examples This font is also used for the proper...

Page 10: ...rt directions for the NI 651x devices The NI 6520 6521 devices contain five Form A single pole single throw SPST non latching relay outputs three Form C single pole double throw SPDT non latching rela...

Page 11: ...e general operation registers Read the ID Register one of the general operation registers to verify the PCI interface is initialized properly For more information on the ID Register refer to the ID Re...

Page 12: ...O I O I O I O I O I O I O I O I O PCI 6510 I I I I PCI 6511 I I I I I I I I PXI 6511 I I I I I I I I PCI 6512 O O O O O O O O PXI 6512 O O O O O O O O PCI 6513 O O O O O O O O PXI 6513 O O O O O O O O...

Page 13: ...the size of the register in bits and the type of register read only write only or read and write Registers are grouped in the table by function A bit by bit description of each register follows the t...

Page 14: ...0xN0 Read write 8 bit RTSI Enable RTSI_En N 0x49 0xN0 Read write 8 bit Note N is the port number in hexidecimal Ports can range from 0 to 11 0x0 to 0xB depending on your device For each port you must...

Page 15: ...invalid data Table 2 3 NI 6509 651x 6520 6521 6528 Register Address Map Watchdog Timer Registers Register Name Offset Hex Type Size Watchdog Timer Software Timeout Enable 0x15 Read write 8 bit Watchdo...

Page 16: ...Note Ports can range from 0 to 11 0x0 to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offsets 0x40 0x N 0 Type Read wr...

Page 17: ...ch port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x41 0x N 0 Type Read write Size 8 bit Bit Map Bit Name Description 7 1 Reserved Write only zeros to...

Page 18: ...Note Ports can range from 0 to 11 0x0 to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x42 0x N 0 Type Read wri...

Page 19: ...n hexidecimal Note Ports can range from 0 to 11 0x0 to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x43 0x N 0...

Page 20: ...to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x44 0x N 0 Type Read write Size 8 bit Bit Map Bit Name Descri...

Page 21: ...ch port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x46 0x N 0 Type Read write Size 8 bit Bit Map Bit Name Description 7 1 Reserved Write only zeros to...

Page 22: ...ange from 0 to 11 0x0 to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x47 0x N 0 Type Read write Size 8 bit Bi...

Page 23: ...bidirectional ports Note Ports can range from 0 to 11 0x0 to 0xB depending on your device For each port you must add an additional offset equal to 0x10 time the port number in hex Address Offset 0x48...

Page 24: ...e a 1 to any bit to enable RTSI routing to the corresponding port bit RTSI can only be enabled on two ports The second port can only have one bit the least significant bit LSB or bit 0 of the port ena...

Page 25: ...r to confirm that you are successfully reading from your device Address Offset 0x00 Type Read Size 8 bit Bit Map Bit Name Description 7 0 ID 7 0 Contains the ID of your device in hexidecimal Usually c...

Page 26: ...n the minimum watchdog timer expiration interval to indicate that the application is running as expected 4 ClrWDTExp Set this bit to 1 to clear the effect of a watchdog timer expiration 3 ClrEdge Set...

Page 27: ...terrupt if falling edge interrupts are enabled 3 Rising Edge Status A 1 indicates that there has been a rising edge that could cause an interrupt if rising edge interrupts are enabled 2 MasterInterrup...

Page 28: ...r expiration 4 Falling Edge IntEnable Enable interrupt on falling edge detection 3 Rising Edge IntEnable Enable interrupt on rising edge detection 2 Master Interrupt Enable This bit must be 1 for any...

Page 29: ...Description 31 0 Rev 31 0 Contains the revision of your device 31 30 29 28 27 26 25 24 Rev 31 Rev 30 Rev 29 Rev 28 Rev 27 Rev 26 Rev 25 Rev 24 23 22 21 20 19 18 17 16 Rev 23 Rev 22 Rev 21 Rev 20 Rev...

Page 30: ...e only zeros to these bits 19 0 FI 19 0 Filter interval bits 19 and down to 0 in increments of 200 ns For more information on digital filtering registers refer to the Filter Enable Registers section 3...

Page 31: ...ription 7 2 Reserved Write only zeros to these bits 1 SystemClockStatus Bit 1 indicates which clock is currently being used as the system clock SClk A 0 indicates the PXI 10 MHz backplane clock is bei...

Page 32: ...er expires Address Offset 0x15 Type Read write Size 8 bit Bit Map Bit Name Description 7 1 Reserved Write only zeros to these bits 0 WDTSwToEn Set this bit to ensure the device goes to a specified exp...

Page 33: ...expiration state Address Offset 0x17 Type Read Size 8 bit Bit Map Bit Name Description 7 1 Reserved Disregard these bits 0 WDTExpStat A 0 indicates the device is operating normally A 1 indicates the d...

Page 34: ...unt of time in increments of 100 ns the device waits before going to the expiration state 31 30 29 28 27 26 25 24 WDT_TI 31 WDT_TI 30 WDT_TI 29 WDT_TI 28 WDT_TI 27 WDT_TI 26 WDT_TI 25 WDT_TI 24 23 22...

Page 35: ...should not be 1 in any other RTSI register Write a 1 to a bit to make that RTSI line drive the value of the corresponding pin of the RTSI enabled input port RTSI IR 8 corresponds to the PXI Star Trigg...

Page 36: ...hese bits 8 0 RTSI PED 8 0 If a bit is 1 in this register it should not be 1 in any other RTSI register Write a 1 to a bit to make that RTSI line drive the value of the corresponding pin of the RTSI e...

Page 37: ...os to these bits 8 0 RTSI PWE 8 0 If a bit is 1 in this register it should not be 1 in any other RTSI register Write a 1 to a bit to make that RTSI line pulse for 200 ns when the watchdog timer expire...

Page 38: ...timer to expire Write a 1 to this register to allow the watchdog timer to expire on a rising falling RTSI line RTSI Trig 8 corresponds to the PXI Star Trigger line on PXI devices For more information...

Page 39: ...trigger the edge detection in compliance with PXI specifications At power up asynchronous edge detection is selected by default Address Offset 0x16 Type Read write Size 8 bit Bit Map Bit Name Descript...

Page 40: ...eneric bus interface you can use to support additional operating systems To download the NI Measurement Hardware DDK and NI 6509 651x 6520 6521 6528 examples go to ni com info and enter mhddk Using In...

Page 41: ...ndor ID 0x1093 and one of the device IDs listed in Table 3 1 1 You can obtain more information on PCI BIOS calls from the PCI SIG online at www pcisig com Table 3 1 Static DIO Devices and IDs Device I...

Page 42: ...the device All values in this example are 32 bits Use the following pseudocode to re map the PCI MITE to memory address 0xD0000 and the device to memory address 0xD1000 PCI 6528 0x70A9 24 Input 24 Out...

Page 43: ...he device other than the PCI MITE to PCI configuration space offset 0x14 BAR1 Create the window data value by masking the new device address window data value 0xFFFFFF00 AND new device address OR 0x00...

Page 44: ...very question receives an answer For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visi...

Page 45: ...ld not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide...

Page 46: ...ary semiconductor component designed and manufactured to perform a set of specific functions for a specific application C CompactPCI refers to the core specification defined by the PCI Industrial Comp...

Page 47: ...nd transients optocoupler a device that transfers electrical signals by utilizing light waves to provide coupling with electrical isolation between input and output P PCI Peripheral Component Intercon...

Page 48: ...tic tools NI resources A 1 DN bits IO Port Data register 2 4 drivers NI resources A 1 E examples NI resources A 1 F FEE N bits Falling Edge Sensitivity Configuration registers 2 7 FI N bits Filter Int...

Page 49: ...port registers Falling Edge Sensitivity Configuration registers 2 7 Filter Enable registers 2 8 IO Port Data 2 4 IO Select registers 2 5 Rising Edge Sensitivity Configuration registers 2 6 RTSI Enable...

Page 50: ...re NI resources A 1 T technical support resources A 1 training and certification NI resources A 1 troubleshooting NI resources A 1 W WDT_En bits Watchdog Timer Enable registers 2 10 WDT_TI N bits Watc...

Page 51: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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