Chapter 2
DAQ System Overview
2-2
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Figure 2-2.
General M Series Block Diagram
DAQ-STC2 and DAQ-6202
The DAQ-STC2 and DAQ-6202 implement a high-performance digital
engine for M Series data acquisition hardware. Some key features of this
engine include the following:
•
Flexible AI and AO sample and convert timing
•
Many triggering modes
•
Independent AI, AO, DI, and DO FIFOs
•
Generation and routing of RTSI signals for multi-device
synchronization
•
Generation and routing of internal and external timing signals
•
Two flexible 32-bit counter/timer modules with hardware gating
•
Digital waveform acquisition and generation
•
Static DIO signals
•
True 5 V high current drive DO
•
DI change detection
•
PLL for clock synchronization
•
Seamless interface to signal conditioning accessories
•
PCI/PXI interface
•
Independent scatter-gather DMA controllers for all acquisition and
generation functions
Analog Output
Digital I/O
Analog Input
Counters
PFI
Digital
Routing
and Clock
Generation
Bus
Interface
Bus
I/O Connector
RTSI