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11
NI 1483R User Guide and Specifications
17. In the VI front panel, select
Window»Show Block Diagram
.
18. In the Acquisition loop, locate the Host DMA 16 FIFO. Right-click the Host DMA 16 FIFO and
select
Select FIFO»Pixel Data 16
.
19. Expand the sequence structure downward.
20. Below the Camera Trigger loop, add a new Timed Loop to the block diagram by selecting it from
the
Programming»Structures»Timed Structures»Timed Loop
palette.
21. Right-click the clock icon on the left side of the Timed Loop and select
Configure Input Node
.
22. In the Configure Timed Loop window, configure the loop as shown in Figure 7.
Figure 7.
Configuring the Timed Loop Properties
23. Refer to Figure 8 while completing the following steps to build the threshold loop.
Figure 8.
Threshold Loop
a.
Add 4
FIFO Method Nodes
from the
Programming»Memory & FIFO
palette to the
Threshold loop.
b.
Configure two of the FIFO Method Nodes to be Pixel Data 16 nodes by right-clicking the
nodes and selecting
Select FIFO»Pixel Data 16
.
c.
Right-click one of the Pixel Data 16 nodes, and select
Select Method»Status»Get Number
of Elements to Read
.
d.
Right-click the other Pixel Data 16 node, and select
Select Method»Read
.
Summary of Contents for NI 1483
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