Appendix A
Specifications
A-10
ni.com
External Clock Source
Frequency ...............................................10 MHz ±100 PPM
Input amplitude
Rear panel BNC...............................200 mV
PP
to 5 V
PP
square-wave
or sine-wave
System timing slot
PXI_CLK10_IN ..............................5 V or 3.3 V TTL signal
Rear panel BNC input impedance ..........50
Ω
±5
Ω
Maximum jitter introduced
by backplane ...........................................1 ps RMS phase-jitter
(10 Hz–1 MHz range)
PXIe_SYNC_CTRL
V
IH
..........................................................2.0–5.5 V
V
IL
...........................................................0–0.8 V
PXI Star Trigger
Maximum slot-to-slot skew ....................250 ps
Backplane characteristic impedance.......65
Ω
±10%
Notes
For PXI slot to PXI Star mapping refer to the
section of
For other specifications refer to the
PXI-1 Hardware Specification
.
PXI Differential Star Triggers (PXIe-DSTARA,
PXIe-DSTARB, PXIe-DSTARC)
Maximum slot-to-slot skew ....................150 ps
Maximum differential skew....................25 ps
Backplane differential impedance ..........100
Ω
±10%
