National Instruments Multifunction RIO NI R Series, User Manual

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Chapter 1 Introduction
© National Instruments Corporation 1-3 R Series Multifunction RIO User Manual
PXI-specific feat
u
res are implemented on the J2 connector of the
CompactPCI b
u
s. Table 1-2 lists the J2 pins
u
sed by the NI PXI-78 xx R.
The NI 78 xx R is compatible with any CompactPCI chassis with a s
u
b-b
u
s
that does not drive these lines. Even if the s
u
b-b
u
s is capable of driving
these lines, the R Series device is still compatible as long as those pins on
the s
u
b-b
u
s are disabled by defa
u
lt and are never enabled.
Caution Damage can res
u
lt if the J2 lines are driven by the s
u
b-b
u
s.
Overview of Reconfigurable I/O
This section explains reconfig
u
rable I/O and describes how to
u
se the
LabVIEW FPGA Mod
u
le to b
u
ild high-level f
u
nctions in hardware.
Refer to Chapter 2, Hardware Overview of the NI 78xxR , for descriptions
of the I/O reso
u
rces on the NI 78 xx R.
Reconfigurable I/O Concept
R Series M
u
ltif
u
nction RIO devices are based on a reconfig
u
rable FPGA
core s
u
rro
u
nded by fixed I/O reso
u
rces for analog and digital inp
u
t and
o
u
tp
u
t. Yo
u
can config
u
re the behavior of the reconfig
u
rable FPGA to
match the req
u
irements of the meas
u
rement and control system. Yo
u
can
implement this
u
ser-defined behavior as an FPGA VI to create an
application-specific I/O device.
Table 1-2. Pins Used by the NI PXI-78 xx R
NI PXI-78
xx
R Signal PXI Pin Name PXI J2 Pin Number
PXI_Trig<0..7> PXI Trigger<0..7> A16, A17, A18, B16, B18, C18, E16, E18
PXI_Clk10 PXI Clock 10 MHz E17
PXI_Star PXI Star Trigger D17
PXI_Lbl<0..12>
*
LBL<0..12> A1, A19, C1, C19, C20, D1, D2, D15, D19,
E1, E2, E19, E20
PXI_Lbr<0..12>
*
LBR<0..12> A2, A3, A20, A21, B2, B20, C3, C21,
D3, D21, E3, E15, E21
*
NI PXI-781 x R/783 x R only