National Instruments AT-MIO-64F-5, User Manual

Page: 174 / 266

Programming Chapter 5
AT-MIO-64F-5 User Manual 5-30 © National Instruments Corporation
the pattern 1011, the signal connected to pin A5 appears at pin B4. This arrangement allows
Trigger Line 4 to be driven by the AT-MIO-64F-5 OUT1 signal. In this way, boards connected
via the RTSI bus can send signals to each other over the RTSI bus trigger lines.
To program the RTSI switch, complete these steps:
1. Calculate the 56-bit pattern based on the desired signal routing.
a. Clear the OUTEN bit for all input pins and for all unused pins.
b. Select the signal source pin for all output pins by setting bits S2 through S0 to the source
pin number.
c. Set the OUTEN bit for all output pins.
2. For i = 0 to 55, follow these steps:
a. Copy bit i of the 56-bit pattern to bit 0 of an 8-bit temporary variable.
b. Write the temporary variable to the RTSI Switch Shift Register (8-bit write).
3. Write 0 to the RTSI Switch Strobe Register (8-bit write). This operation loads the 56-bit
pattern into the RTSI switch. At this point, the new signal routing goes into effect.
Step 2 can be completed by simply writing the low-order 8 bits of the 56-bit pattern to the RTSI
Switch Shift Register, then shifting the 56-bit pattern right once, and repeating this two-step
operation a total of 56 times. Only bit 0 of the word written to the RTSI Switch Shift Register is
used. The higher-order bits are ignored.
Programming DMA Operations
The AT-MIO-64F-5 can be programmed so that the ADCFIFOEF* generates DMA requests
every time one or more A/D conversion values are stored in the ADC FIFO, when the
ADCFIFOHF* is low and the FIFO is half-full, and when the DACFIFO requires at least one
data value (DACFIFOFF* is set), and when the DACFIFO is less than half full (DACFIFOHF*
is set). There are two DMA modesÐsingle-channel transfer and dual-channel transfer.
Single-channel DMA uses only Channel A DMA signals, while dual-channel DMA uses signals
for both Channel A and Channel B. The DMA channels are selected through Command
Register 2. To program the DMA operation, perform the following steps after the circuitry on
the AT-MIO-64F-5 is set up:
1. Set the appropriate mode bits in Command Register 3 to enable DMA request generation.
2. Access the DMATCA and DMATCB Clear Registers, the TMRREQ Clear Register, the
DAC Clear Register, and the DAQ Clear Register.
3. Program the DMA controller to service DMA requests from the AT-MIO-64F-5 board.
Refer to the IBM Personal Computer AT Technical Reference manual for more information
on DMA controller programming.
4. If a DMA terminal count is received after the DMA service, write 0 to either the appropriate
DMATC Clear Register to clear the DMATCA or DMATCB bits in Status Register 1.