National Instruments 6583R User Manual And Specifications Download Page 10

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NI 6583R User Guide and Specifications

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Note

For the DIO and PFI lines, drive the GPIO Direction high for output and low for input.

For CLK OUT, drive the GPIO Direction high for enable and low for disable.

DDC A

(Single-ended I/O)

DIO 26

GPIO_50_n

GPIO_50

DIO 27

GPIO_13_n

GPIO_13

DIO 28

GPIO_32_n

GPIO_32

DIO 29

GPIO_31_n

GPIO_31

DIO 30

GPIO_49_n

GPIO_49

DIO 31

GPIO_33_n

GPIO_33

PFI 1

GPIO_0_n

GPIO_0

PFI 2

GPIO_18_n

GPIO_18

PFI 3

GPIO_1_n

GPIO_1

STROBE

GClk_SE

—

CLK OUT

GPIO_17_n

GPIO_17

(as enable)

Table 4.

NI 6583 Single-Ended Signals and NI FlexRIO FPGA Module Signals (Continued)

NI 6583

NI FlexRIO FPGA Module

Connector

Signal Name

GPIO I/O

GPIO Direction

Summary of Contents for 6583R

Page 1: ...NI 6583R which is composed of an NI FlexRIO FPGA module and the NI 6583 This document also contains tutorial sections that demonstrate how to acquire data using a LabVIEW FPGA example VI and how to cr...

Page 2: ...Module Installation Guide and Specifications for installation instructions Figure 1 shows an example of a properly connected NI FlexRIO device Figure 1 NI 6583R Note NI 6583R refers to the combination...

Page 3: ...FPGA Module Help Embedded in LabVIEW Help Contains information about the basic functionality of LabVIEW FPGA Module NI FlexRIO Help Embedded in LabVIEW FPGA Module Help Contains FPGA module adapter m...

Page 4: ...GND GND GND PFI 1 PFI 2 PFI 3 GND DIO 0 DIO 1 DIO 2 DIO 3 DIO 4 DIO 5 DIO 6 DIO 7 DIO 8 DIO 9 DIO 10 DIO 11 DIO 12 DIO 13 DIO 14 DIO 15 1 3 2 4 6 5 7 9 8 10 12 11 13 15 14 16 18 17 19 21 20 22 24 23...

Page 5: ...ignal Name Pin s Signal Type Signal Description DDC CLK OUT 33 Clock Terminal for the single ended exported Sample clock STROBE 67 Clock External Sample clock source that can be used for source synchr...

Page 6: ...ive external Sample clock source that can be used for dynamic acquisition DIO 0 15 14 17 20 23 26 29 32 35 38 41 44 47 50 53 56 59 Data Positive bidirectional digital I O data channels 0 through 15 DI...

Page 7: ...nes provide a low noise low power low amplitude differential method for high speed digital data transfer Figure 4 Clock Input Signals Figure 5 Differential Data and PFI Lines DDC A STROBE UserGclkLvds...

Page 8: ...Module GPIO I O Direction Control from NI FlexRIO FPGA Module GPIO Direction DDC A Channel 50 Clock from NI FlexRIO FPGA Module GPIO Output Output Enable from NI FlexRIO FPGA Module GPIO Direction Cl...

Page 9: ...583 NI FlexRIO FPGA Module Connector Signal Name GPIO I O GPIO Direction DDC A Single ended I O DIO 0 GPIO_16_n GPIO_16 DIO 1 GPIO_2_n GPIO_2 DIO 2 GPIO_19_n GPIO_19 DIO 3 GPIO_5_n_CC GPIO_5_CC DIO 4...

Page 10: ...I O DIO 26 GPIO_50_n GPIO_50 DIO 27 GPIO_13_n GPIO_13 DIO 28 GPIO_32_n GPIO_32 DIO 29 GPIO_31_n GPIO_31 DIO 30 GPIO_49_n GPIO_49 DIO 31 GPIO_33_n GPIO_33 PFI 1 GPIO_0_n GPIO_0 PFI 2 GPIO_18_n GPIO_18...

Page 11: ...60 DIO 4 GPIO_62 GPIO_61_n GPIO_62_n DIO 5 GPIO_64 GPIO_63_n GPIO_63 DIO 6 GPIO_42 GPIO_42_n GPIO_41_n DIO 7 GPIO_56_CC GPIO_55_n GPIO_56_n_CC DIO 8 GPIO_54_n GPIO_54 GPIO_55 DIO 9 GPIO_39_n_CC GPIO_3...

Page 12: ...llowing NI cables and accessories are not properly shielded for EMC compliant use with the NI 6583 NI CB 2162 single ended digital I O accessory NI SHC68 H1X38 high speed digital flying leads cable ac...

Page 13: ...2162 Accessory Figure 9 Connecting the NI SMB 2163 Accessory 1 PXI PXI Express Chassis with NI 6583R 2 NI SHC68 C68 D4 Cable 3 NI CB 2162 Accessory 1 PXI PXI Express Chassis with NI 6583R 2 NI SMB 216...

Page 14: ...rcuits for interfacing testing or analysis This cable offers connectivity similar to that found on a typical logic analyzer so you can use it in logic analyzer type applications Unlike a typical logic...

Page 15: ...MA 2164 Accessory 1 PXI PXI Express Chassis with an NI 6583R 2 NI SHB12 B12X Cable 3 NI SMA 2164 NI PXI 6561 100 MHz LVDS DIO DIGITAL DATA CONTROL ACCESS ACTIVE 1 2 NI PXI 1042 3 STROBE CLK_LVPECL IO_...

Page 16: ...or the VHDCI cable from NI For more information about creating these custom accessories refer to the Interfacing to the NI Digital Waveform Generator Analyzer using the VHDCI Connector application not...

Page 17: ...ollowing steps to run an example VI that generates a waveform on the even channels of your device and then acquires that waveform on the odd channels of your device Hardware Configuration 1 For single...

Page 18: ...nce window f Save the VI 6 On the front panel select appropriate values in the Num Samples Generation Mode Generation Constant and DDC A Voltage Level controls 7 Click the Run button to run the VI The...

Page 19: ...6 In the Project Explorer window select FPGA Target RIOx PXI 79xxR 7 Right click IO Module and select Properties In the General category select National Instruments NI 6583 and you can see the availa...

Page 20: ...g Your block diagram should now resemble the block diagram in Figure 14 Figure 14 Static RW with Voltage FPGA vi Block Diagram 21 Save the VI as Static RW with Voltage FPGA vi 22 Close the VI 23 In th...

Page 21: ...he FPGA Interface palette inside the While Loop 11 Wire the Open FPGA VI Reference function FPGA VI Reference Out indicator to the FPGA VI Reference In control on the Read Write Control function 12 Wi...

Page 22: ...that the channel is an output Each of the 32 bits corresponds directly with each of the 32 channels Bit 0 corresponds with channel 0 and so on 4 Connect an output channel to an input channel or to a d...

Page 23: ...gration functionality of the user defined CLIP but also allows the CLIP to communicate directly with circuitry external to the FPGA Adapter module socketed CLIP allows your IP to communicate directly...

Page 24: ...es on DDC B are accessed using a U16 data type in LabVIEW FPGA Each I O line has a direction signal This CLIP also allows for individual clock output inversion NI 6583 DDR Connector CLIP Provides read...

Page 25: ...C B 16 differential data 3 differential PFI Direction control of digital I O channels Per channel Minimum required direction change latency 9 ns for single ended signals only Number of clock input ter...

Page 26: ...diode clamps may begin conducting outside the 0 V to VCC range LVDS Channels DDC B Consistent with TI part number SN65LVDM180 Number of programmable I O voltage levels None Power up state Drivers dis...

Page 27: ...DDC B Consistent with TI part number SN65MLVD207 Number of programmable I O voltage levels None Power up state Drivers disabled 100 differential impedance Fault protection Type 2 Typical data rate 20...

Page 28: ...m 5 1 0 8 4 7 in Weight 284 g 10 oz Front panel connectors One 68 pin VHDCI connector and one 73 pin InfiniBand connector Environmental The NI 6583 is intended for indoor use only Operating environmen...

Page 29: ...or UL and other safety certifications refer to the product label or the Online Product Certification section Electromagnetic Compatibility This product meets the requirements of the following EMC stan...

Page 30: ...ore information about WEEE recycling centers National Instruments WEEE initiatives and compliance with WEEE Directive 2002 96 EC on Waste and Electronic Equipment visit ni com environment weee Where t...

Page 31: ...re trademarks or trade names of their respective companies For patents covering National Instruments products technology refer to the appropriate location Help Patents in your software the patents txt...

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