National Instruments 6508 PCI-DIO-96 User Manual Download

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PCI-DIO-96 User Manual

A 96-Bit Parallel Digital I/O Interface

for PCI Bus Computers

January 1997 Edition

Part Number 320938B-01

Summary of Contents for 6508 PCI-DIO-96

Page 1: ...CI DIO 96 User Manual A 96 Bit Parallel Digital I O Interface for PCI Bus Computers January 1997 Edition Part Number 320938B 01 Copyright 1996 1997 National Instruments Corporation All Rights Reserved...

Page 2: ...mark 45 76 26 00 Finland 09 527 2321 France 01 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 Israel 03 5734815 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Mexico 5 520 2635 Netherland...

Page 3: ...OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contr...

Page 4: ......

Page 5: ...et Started 1 2 Software Programming Choices 1 2 National Instruments Application Software 1 2 NI DAQ Driver Software 1 3 Register Level Programming 1 4 Optional Equipment 1 5 Custom Cabling 1 5 Unpack...

Page 6: ...er Description Format 5 3 Register Description for the 82C55A 5 3 Register Description for the 82C53 5 5 Register Description for the Interrupt Control Registers 5 6 Interrupt Control Register 1 5 7 I...

Page 7: ...Example 6 16 Mode 2 Bidirectional Bus 6 16 Port C Status Word Bit Definitions for Bidirectional Data Path Port A Only 6 18 Mode 2 Bidirectional Bus Programming Example 6 19 Interrupt Handling 6 20 In...

Page 8: ...A 5 4 Figure 5 2 Control Word Format for the 82C53 5 6 Figure 6 1 Control Word to Configure Port A for Mode 1 Input 6 10 Figure 6 2 Control Word to Configure Port B for Mode 1 Input 6 11 Figure 6 3 Po...

Page 9: ...get started software programming choices and optional equipment describes custom cabling options and explains how to unpack the PCI DIO 96 Chapter 2 Installation and Configuration describes how to in...

Page 10: ...following conventions are used in this manual bold Bold text denotes menu items function panel items and dialog box buttons or options bold italic Bold italic text denotes a note caution or warning it...

Page 11: ...read It gives an overview of the SCXI system and contains the most commonly needed information for the modules chassis and software Your SCXI hardware user manuals If you are using SCXI read these ma...

Page 12: ...Instruments document contains information that you may find helpful as you read this manual Application Note 025 Field Wiring and Noise Considerations for Analog Signals The following documents also c...

Page 13: ...16 bit digital I O application The OKI Semiconductor 82C53 counter timer chip has two usable counters that can generate timed interrupt requests to your computer The digital I O lines are all accessi...

Page 14: ...with the NI DAQ instrument driver or you can register level program National Instruments Application Software ComponentWorks contains tools for data acquisition and instrument control built on NI DAQ...

Page 15: ...sion buffered data acquisition high speed A D conversion analog output D A conversion waveform generation timed D A conversion digital I O counter timer operations SCXI RTSI self calibration messaging...

Page 16: ...me consuming and inefficient and is not recommended for most users Even if you are an experienced register level programmer consider using NI DAQ or other National Instruments application software to...

Page 17: ...odules boards and accessories including conditioning for strain gauges and RTDs simultaneous sample and hold and relays For more information about optional equipment available from National Instrument...

Page 18: ...ng the board take the following precautions Ground yourself via a grounding strap or by holding a grounded object Touch the antistatic package to a metal part of your computer chassis before removing...

Page 19: ...installed in any unused PCI expansion slot in your computer The following are general installation instructions Consult your computer user manual or technical reference manual for specific instructio...

Page 20: ...figurable The PCI DIO 96 is fully compliant with the PCI Local Bus Specification Revision 2 0 Therefore all board resources are automatically allocated by the PCI system including the base address and...

Page 21: ...hat exceed any of the maximum ratings of input or output signals on the PCI DIO 96 can damage the PCI DIO 96 board and your computer The description of each signal in this chapter includes information...

Page 22: ...ble 5 V APA0 APA1 APA2 APA3 APA4 APA5 APA6 APA7 APB0 APB1 APB2 APB3 APB4 APB5 APB6 APB7 APC0 APC1 APC2 APC3 APC4 APC5 APC6 APC7 GND BPA1 BPA2 BPA4 BPA5 BPA6 BPA7 BPA0 BPA3 BPB0 BPB1 BPB2 BPB3 BPB4 BPB...

Page 23: ...5 V CPA0 CPA1 CPA2 CPA3 CPA4 CPA5 CPA6 CPA7 CPB0 CPB1 CPB2 CPB3 CPB4 CPB5 CPB6 CPB7 CPC0 CPC1 CPC2 CPC3 CPC4 CPC5 CPC6 CPC7 GND DPA1 DPA2 DPA4 DPA5 DPA6 DPA7 DPA0 DPA3 DPB0 DPB1 DPB2 DPB3 DPB4 DPB5 DP...

Page 24: ...B of PPI B BPB7 is the MSB BPB0 the LSB 33 35 37 39 41 43 45 47 APA 7 0 Bidirectional data lines for port A of PPI A APA7 is the MSB APA0 the LSB 34 36 38 40 42 44 46 48 BPA 7 0 Bidirectional data li...

Page 25: ...ks LabWindows CVI and LabVIEW documentation refers to them as handshaking and no handshaking These signal assignments are the same for all four 82C55A PPIs Refer to Port Identification in Chapter 6 Pr...

Page 26: ...ing OBFA ACKA IBFA STBA INTRA I O I O I O Indicates that the signal is active low Subscripts A and B denote port A or port B handshaking signals Input logic high voltage 2 2 V minimum 5 3 V maximum In...

Page 27: ...r digital output and PPI C port B is configured for digital input Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch in Figure...

Page 28: ...lists the timing specifications for handshaking with the PCI DIO 96 The handshaking lines STB and IBF synchronize input transfers The handshaking lines OBF and ACK synchronize output transfers Table 3...

Page 29: ...generated from the control lines of the computer I O expansion bus WR Internal Write This signal is the write signal generated from the control lines of the computer I O expansion bus DATA Bidirectio...

Page 30: ...r in mode 1 are as follows Figure 3 4 Timing Specifications for Mode 1 Input Transfer Name Description Minimum Maximum T1 STB Pulse Width 100 T2 STB 0 to IBF 1 150 T3 Data before STB 1 20 T4 STB 1 to...

Page 31: ...output transfer in mode 1 are as follows Figure 3 5 Timing Specifications for Mode 1 Output Transfer Name Description Minimum Maximum T1 WR 0 to INTR 0 250 T2 WR 1 to Output 200 T3 WR 1 to OBF 0 150...

Page 32: ...pecifications for Mode 2 Bidirectional Transfer Name Description Minimum Maximum T1 WR 1 to OBF 0 150 T2 Data before STB 1 20 T3 STB Pulse Width 100 T4 STB 0 to IBF 1 150 T5 Data after STB 1 50 T6 ACK...

Page 33: ...ory of Operation This chapter contains a functional overview of the PCI DIO 96 and explains the operation of each functional unit comprising the PCI DIO 96 Functional Overview The block diagram in Fig...

Page 34: ...s Specification 2 0 The base memory address and interrupt level for the board are stored inside the MITE at power on You do not need to set any switches or jumpers I O Connector Interrupt Control Circ...

Page 35: ...ifferent modes The PCI DIO 96 uses two of the counters to generate interrupt requests the third counter is not used and is not accessible Refer to Chapter 5 Register Map and Description or to Appendix...

Page 36: ...O 96 interrupt control circuitry Figure 4 2 PCI DIO 96 Interrupt Control Circuitry Block Diagram CLK0 GATE0 OUT0 CLK1 GATE1 OUT1 CLK2 GATE2 OUT2 2 MHz 5 V 5 V 82C55A PPI A 82C55A PPI B 82C55A PPI D 82...

Page 37: ...re four 82C55A PPI devices on the board they are referenced as PPI A PPI B PPI C and PPI D when differentiation is required The three 16 bit counters of the 82C53 are accessed through individual data...

Page 38: ...it 8 bit Read and write Read and write Read and write Write only PPI B PORTA Register PORTB Register PORTC Register Configuration Register 04 05 06 07 8 bit 8 bit 8 bit 8 bit Read and write Read and w...

Page 39: ...er with the MSB bit 7 shown on the left and the LSB bit 0 shown on the right A rectangle with the bit name inside represents each bit The bit map for the Interrupt Clear Register states not applicable...

Page 40: ...reset format of port C Figure 5 1 Control Word Formats for the 82C55A D7 D6 D5 D4 D3 D2 D1 D0 Group A Group B Mode Selection 00 Mode 0 01 Mode 1 1X Mode 2 Control Word Flag 1 Mode Set Port A 1 Input...

Page 41: ...trol word select the counter to be programmed Bits 5 and 4 select the mode by which the count data is written to and read from the selected counter Bits 3 2 and 1 select the mode for the selected coun...

Page 42: ...register has a master interrupt enable bit and two bits for the timed interrupt circuitry Of the latter two bits one bit enables counter interrupts while the other selects counter 0 or counter 1 The...

Page 43: ...2 are both set PPI D sends an interrupt INTRA to the computer If this bit is cleared PPI D does not send the interrupt INTRA to the computer regardless of the setting of INTEN 5 CIRQ1 PPI C Port B In...

Page 44: ...set PPI B sends an interrupt INTRA to the computer If this bit is cleared PPI B does not send the interrupt INTRA to the computer regardless of the setting of INTEN 1 AIRQ1 PPI A Port B Interrupt Enab...

Page 45: ...Interrupt Enable Bit If this bit is set the 82C53 counter outputs can interrupt the computer If this bit is cleared the counter outputs have no effect 0 CTR1 Counter Select Bit If this bit is set the...

Page 46: ...ssociated with it Use this register to reset the state of the interrupt request signal once the interrupt routine has been entered To clear the interrupt perform an 8 bit write to this register addres...

Page 47: ...32 bit bus with multiplexed address and data lines The PCI system arbitrates and assigns resources through software freeing you from manually setting switches and jumpers Bus related resources must be...

Page 48: ...of PPI A Port B Register Base Address 0x01 Port C Address of PPI A Port C Register Base Address 0x02 8255Cnfg Address of PPI A Configuration Register Base Address 0x03 Ctr0 Address of 82C53 Counter 0...

Page 49: ...al Instruments vendor ID 0x1093 and PCI DIO 96 device ID 0x0160 If a board is found the algorithm stores all the board s configuration information into a data structure Base Address Register 0 BAR0 co...

Page 50: ...the memory range to which you re map the board is not being used by another device or system resource You can exclude this memory from use with a memory manager PCI Initialization for the Macintosh Pr...

Page 51: ...to do simple accesses with the board If you want to use interrupts you must work directly with the Macintosh Operating System OS and you could inadvertently corrupt portions of NI DAQ Therefore Natio...

Page 52: ...MgrConfigReadLong deviceNode LogicalAddress 0x00000014L cardBaseAddress activate the standard i o window unsigned long miteBaseAddress 0x000000c0L EndianSwap32Bit cardBaseAddress 0xffffff00L 0x0000008...

Page 53: ...I O Mode 1 Strobed I O Mode 2 Bidirectional bus The 82C55A also has a single bit set reset feature for port C which is programmed by the 8 bit control word For additional information refer to Appendi...

Page 54: ...terrupt generation and enable disable functions are available Mode 2 This mode can be used for communication over a bidirectional 8 bit bus Handshaking signals are used in a manner similar to mode 1 M...

Page 55: ...Output Output Input Input 4 10001000 Output Input Output Output 5 10001001 Output Input Output Input 6 10001010 Output Input Input Output 7 10001011 Output Input Input Input 8 10010000 Input Output O...

Page 56: ...ppropriately in the control word if you want to use the other ports in combination with the example In mode 1 the digital I O bits are divided into two groups group A and group B Each of these groups...

Page 57: ...re 6 2 Control Word to Configure Port B for Mode 1 Input During a mode 1 data read transfer read port C to obtain the status of the handshaking lines and interrupt signals See the Port C Status Word B...

Page 58: ...has been loaded into the input latch for port A 4 INTEA Interrupt Enable Bit for Port A Setting this bit enables interrupts from port A of the 82C55A Control this bit by setting resetting PC4 3 INTRA...

Page 59: ...PI A for mode 1 input Write 8255Cnfg 0xB0 Set mode 1 port A is an input Loop until IBFA PC5 is set indicating that data is available in port A to be read Read PortA Now read the data from port A Mode...

Page 60: ...Notice that port B does not have extra input or output lines from port C Figure 6 5 Control Word to Configure Port B for Mode 1 Output During a mode 1 data write transfer you can obtain the status of...

Page 61: ...Output These bits can be used for general purpose I O when port A is in mode 1 output If these bits are configured for output you must use the port C bit set reset function to manipulate them 3 INTRA...

Page 62: ...e data to port A Mode 2 Bidirectional Bus Note For mode 2 examples you must configure the don t care bits appropriately in the control word if you want to use the other ports in combination with the e...

Page 63: ...nal Data Bus During a mode 2 data transfer you can obtain the status of the handshaking lines and interrupt signals by reading port C The port C status word bit definitions for a mode 2 transfer are s...

Page 64: ...bles output interrupts from port A of the 82C55A Control this bit by setting resetting PC6 5 IBFA Input Buffer Acknowledgment for Port A A high setting indicates that data has been loaded into the inp...

Page 65: ...Mode 2 Bidirectional Bus Programming Example The following example shows how to configure PPI A for mode 2 input and output Write 8255Cnfg 0xC0 Set mode 2 port A is bidirectional Loop until OBFA PC7 i...

Page 66: ...C53 counter outputs program the counters as described in the Interrupt Programming Example section later in this chapter You can use external signals to interrupt the PCI DIO 96 when port A or port B...

Page 67: ...output Write 8255Cnfg 0x0D Set PC6 to enable interrupts from 82C55A Write IREG2 0x04 Set INTEN bit Write IREG1 0x01 Set AIRQ0 to enable PPI A port A interrupts Mode 2 Bidirectional Bus Programming Exa...

Page 68: ...u use counter 1 to interrupt the computer counter 0 is a frequency scale that feeds the source input for counter 1 In this case configure both counters for rate generation or mode 2 To determine the t...

Page 69: ...n you are ready to exit your program disable the counter and interrupts as shown below Write Cnfg 0x30 Turn off counter 0 Write IREG2 0x00 Disable all PCI DIO 96 interrupts Note In order for any of th...

Page 70: ......

Page 71: ...ns are typical at 25 C unless otherwise noted Digital I O Number of channels 96 I O Compatibility TTL Reference voltage 5 V Power on state Inputs High Z pulled up through 100 k Digital logic levels Le...

Page 72: ...ical Dimensions 13 7 x 10 7 cm 5 4 x 4 2 in I O connector 100 pin female 0 050 series D type Environment Operating temperature 0 to 70 C Storage temperature 55 to 150 C Relative humidity 5 to 90 nonco...

Page 73: ...ndix contains a manufacturer data sheet for the MSM82C55A CMOS programmable peripheral interface OKI Semiconductor This interface is used on the PCI DIO 96 Copyright OKI Semiconductor 1993 Reprinted w...

Page 74: ...appendix contains a manufacturer data sheet for the MSM82C53 CMOS programmable interval timer OKI Semiconductor This timer is used on the PCI DIO 96 Copyright OKI Semiconductor 1993 Reprinted with pe...

Page 75: ...ms does not answer your questions we offer fax and telephone support through our technical support centers which are staffed by applications engineers Electronic Services National Instruments has BBS...

Page 76: ...urce from which you purchased your software to obtain support Telephone Fax Australia 03 9879 5166 03 9879 6277 Austria 0662 45 79 90 0 0662 45 79 90 19 Belgium 02 757 00 20 02 757 03 11 Canada Ontari...

Page 77: ...______________________________________________ _______________________________________________________________________________ National Instruments hardware product model __________ Revision _________...

Page 78: ...ther __________________ Software version ______________________________________________________________ Other Products Computer make and model ______________________________________________________ Mi...

Page 79: ...__________________________________________________ _______________________________________________________________________________ _____________________________________________________________________...

Page 80: ...DIO 96 User Manual Glossary Numbers Symbols degrees greater than greater than or equal to less than negative of or minus ohms per percent Prefix Meaning Value p pico 10 12 n nano 10 9 micro 10 6 m mi...

Page 81: ...PPI A port A interrupt enable bit AIRQ1 PPI A port B interrupt enable bit ANSI American National Standards Institute APA PPI A port A APB PPI A port B APC PPI A port C ASIC Application Specific Integr...

Page 82: ...ses the personal computer to collect measure and generate electrical signals DI digital input DIO digital input output DIRQ0 PPI D port A interrupt enable bit DIRQ1 PPI D port B interrupt enable bit D...

Page 83: ...signal in inches INTE1 port A output interrupt enable bit INTE2 port A input interrupt enable bit INTEA port A interrupt enable bit INTEB port B interrupt enable bit INTEN interrupt enable bit INTRA...

Page 84: ...ough 7 lines PCI Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standa...

Page 85: ...only high level signals are sent to DAQ boards in the noisy PC environment signal conditioning the manipulation of signals to prepare them for digitizing STB strobe input signal T TTL transistor trans...

Page 86: ...ramming example 6 10 Mode 1 strobed input 6 10 to 6 13 control word configuration Port A figure 6 10 Port B figure 6 11 Port C pin assignments figure 6 13 Port C status word bit definitions 6 12 to 6...

Page 87: ...ter Group control word format figure 5 6 82C55A Register Group control word formats figure 5 4 Port C set reset control words table 5 5 Mode 1 strobed input Port A configuration figure 6 10 Port B con...

Page 88: ...bit Mode 1 strobed input 6 12 Mode 1 strobed output 6 15 INTEB bit Mode 1 strobed input 6 12 Mode 1 strobed output 6 15 INTEN bit 5 9 interrupt control circuitry block diagram 4 4 theory of operation...

Page 89: ...erations 6 10 to 6 13 control word to configure Port A figure 6 10 control word to configure Port B figure 6 11 Port C pin assignments on I O connector figure 6 13 Port C status word bit definitions f...

Page 90: ...96 block diagram 4 2 configuration 2 2 custom cabling 1 5 optional equipment 1 5 overview 1 1 requirements for getting started 1 2 software programming choices 1 2 to 1 3 ComponentWorks 1 2 LabVIEW a...

Page 91: ...onfigure Port A figure 6 10 control word to configure Port B figure 6 11 Port C pin assignments on I O connector figure 6 13 Port C status word bit definitions for input 6 12 to 6 13 programming examp...

Page 92: ...Port C pin assignments 3 5 to 3 6 power connections 3 8 timing specifications 3 8 to 3 12 Mode 1 input timing 3 10 Mode 1 output timing 3 11 Mode 2 bidirectional timing 3 12 signal names used in timi...

Page 93: ...I 8 National Instruments Corporation signal names used in timing diagrams table 3 8 to 3 9 U unpacking the PCI DIO 96 1 6 W WR signal description table 3 9 Mode 1 output timing figure 3 11 Mode 2 bidi...

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