National Instruments 622 Series User Manual Download

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A-60

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Appendix A

Module/Device-Specific Information

Note

For a detailed description of each signal, refer to the

I/O Connector Signal

Descriptions

section of Chapter 3,

Connector and LED Information

Note

For more information about default NI-DAQmx counter inputs, refer to

Connecting Counter Signals

in the

NI-DAQmx Help

or the

LabVIEW Help

USB-6281 Mass Termination Important Links

The following list contains links specific to your DAQ device:

•

Specifications—

Refer to the

NI 6281 Specifications

for more detailed information about

the USB-6281 Mass Termination device.

•

LED Patterns

—Refer to the

LED Patterns

section of Chapter 3,

Connector and LED

Information

, for information about the USB-6281 Mass Termination LEDs.

•

Fuse Replacement

—Refer to the

USB Device Fuse Replacement

section of Chapter 1,

Getting Started

, for information about replacing the fuse on the USB-6281 Mass

Termination.

•

Accessory and Cabling Options—

Refer to the

68-Pin M Series Cables and Accessories

section of Chapter 2,

DAQ System Overview

, for more information.

CTR 0 AUX

45 (PFI 10)

CTR 0 OUT

2 (PFI 12)

CTR 0 A

37 (PFI 8)

CTR 0 Z

3 (PFI 9)

CTR 0 B

45 (PFI 10)

CTR 1 SRC

42 (PFI 3)

CTR 1 GATE

41 (PFI 4)

CTR 1 AUX

46 (PFI 11)

CTR 1 OUT

40 (PFI 13)

CTR 1 A

42 (PFI 3)

CTR 1 Z

41 (PFI 4)

CTR 1 B

46 (PFI 11)

FREQ OUT

1 (PFI 14)

Table A-29.

Default NI-DAQmx Counter/Timer Pins (Continued)

Counter/Timer Signal

Default Pin Number (Name)

Summary of Contents for 622 Series

Page 1: ...DAQ M Series M Series User Manual NI 622x NI 625x and NI 628x Multifunction I O Modules and Devices M Series User Manual July 2016 371022L 01 ...

Page 2: ...pport phone numbers email addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the NI Services appendix To comment on NI documentation refer to the NI website at ni com info and enter the Info Code feedback 2004 2016 National Instruments All rights reserved ...

Page 3: ...ITLE OR NON INFRINGEMENT AND ANY WARRANTIES THAT MAY ARISE FROM USAGE OF TRADE OR COURSE OF DEALING NI DOES NOT WARRANT GUARANTEE OR MAKE ANY REPRESENTATIONS REGARDING THE USE OF OR THE RESULTS OF THE USE OF THE PRODUCTS IN TERMS OF CORRECTNESS ACCURACY RELIABILITY OR OTHERWISE NI DOES NOT WARRANT THAT THE OPERATION OF THE PRODUCTS WILL BE UNINTERRUPTED OR ERROR FREE In the event that you and NI h...

Page 4: ...dependent from NI and have no agency partnership or joint venture relationship with NI Patents For patents covering NI products technology refer to the appropriate location Help Patents in your software the patents txt file on your media or the National Instruments Patent Notice at ni com patents Export Compliance Information Refer to the Export Compliance Information at ni com legal export compli...

Page 5: ...bel to USB Screw Terminal Devices 1 6 USB Device Chassis Ground 1 6 USB Device Panel Wall Mounting 1 8 USB Device LEDs 1 8 USB Cable Strain Relief 1 8 USB Device Fuse Replacement 1 9 USB Device Security Cable Slot 1 12 Installing a Ferrite 1 13 Pinouts 1 13 Specifications 1 13 Accessories and Cables 1 13 Chapter 2 DAQ System Overview DAQ Hardware 2 1 DAQ STC2 and DAQ 6202 2 2 Calibration Circuitry...

Page 6: ...round Reference Settings in Software 4 6 Multichannel Scanning Considerations 4 6 Analog Input Data Acquisition Methods 4 9 Software Timed Acquisitions 4 9 Hardware Timed Acquisitions 4 9 Analog Input Triggering 4 10 Connecting Analog Input Signals 4 11 Connecting Floating Signal Sources 4 12 What Are Floating Signal Sources 4 12 When to Use Differential Connections with Floating Signal Sources 4 ...

Page 7: ...urce 4 24 Routing AI Sample Clock Signal to an Output Terminal 4 24 Other Timing Requirements 4 24 AI Sample Clock Timebase Signal 4 25 AI Convert Clock Signal 4 25 Using an Internal Source 4 26 Using an External Source 4 26 Routing AI Convert Clock Signal to an Output Terminal 4 26 Using a Delay from Sample Clock to Convert Clock 4 27 Other Timing Requirements 4 27 AI Convert Clock Timebase Signa...

Page 8: ...utput Terminal 5 8 AO Sample Clock Signal 5 8 Using an Internal Source 5 8 Using an External Source 5 8 Routing AO Sample Clock Signal to an Output Terminal 5 9 Other Timing Requirements 5 9 AO Sample Clock Timebase Signal 5 9 Getting Started with AO Applications in Software 5 10 Chapter 6 Digital I O Static DIO 6 2 Digital Waveform Triggering 6 2 Digital Waveform Acquisition 6 3 DI Sample Clock S...

Page 9: ...equency with One Counter Averaged 7 9 High Frequency with Two Counters 7 9 Large Range of Frequencies with Two Counters 7 10 Choosing a Method for Measuring Frequency 7 11 Position Measurement 7 14 Measurements Using Quadrature Encoders 7 15 Measurements Using Two Pulse Encoders 7 16 Buffered Sample Clock Position Measurement 7 17 Two Signal Edge Separation Measurement 7 17 Single Two Signal Edge ...

Page 10: ...nal 7 28 Frequency Output Signal 7 28 Routing Frequency Output to a Terminal 7 28 Default Counter Timer Pinouts 7 28 Counter Triggering 7 29 Other Counter Features 7 30 Cascading Counters 7 30 Counter Filters 7 30 Prescaling 7 32 Duplicate Count Prevention 7 32 Example Application That Works Correctly No Duplicate Counting 7 33 Example Application That Works Incorrectly Duplicate Counting 7 33 Exa...

Page 11: ...s 9 6 PXI Clock and Trigger Signals 9 8 PXI_CLK10 9 8 PXI Triggers 9 8 PXI_STAR Trigger 9 8 PXI_STAR Filters 9 8 Chapter 10 Bus Interface Data Transfer Methods 10 1 PCI PCI Express Device and PXI PXI Express Module Data Transfer Methods 10 1 USB Device Data Transfer Methods 10 2 PXI Considerations 10 3 PXI Clock and Trigger Signals 10 3 PXI and PXI Express 10 3 Using PXI with CompactPCI 10 4 Chapt...

Page 12: ...1 NI 6224 A 13 NI 6225 A 15 NI 6229 A 21 NI 6250 A 27 NI 6251 A 29 NI 6254 A 37 NI 6255 A 39 NI 6259 A 45 NI 6280 A 53 NI 6281 A 55 NI 6284 A 61 NI 6289 A 63 Appendix B Timing Diagrams Appendix C Troubleshooting Appendix D Upgrading from E Series to M Series Appendix E Where to Go from Here Appendix F NI Services Index ...

Page 13: ... A 15 USB 6251 Screw Terminal Pinout A 31 Figure A 16 USB 6251 BNC Top Panel and Pinout A 33 Figure A 17 USB 6251 Mass Termination Pinout A 35 Figure A 18 PCI PXI 6254 Pinout A 37 Figure A 19 PCI PXI 6255 Pinout A 39 Figure A 20 USB 6255 Screw Terminal Pinout A 41 Figure A 21 USB 6255 Mass Termination Pinout A 43 Figure A 22 NI PCI PCIe PXI PXIe 6259 Pinout A 45 Figure A 23 USB 6259 Screw Terminal...

Page 14: ...ies device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection Caution The maximum input voltages rating of AI signals with respect to ground and for signal pairs in differential mode with respect to each other are listed in the specifications document for your device Exceeding the maximum input voltage of AI signals dist...

Page 15: ... will not occur in a particular installation when the product is connected to a test object or if the product is used in residential areas To minimize the potential for the product to cause interference to radio and television reception or to experience unacceptable performance degradation install and use this product in strict accordance with the instructions in the product documentation Furtherm...

Page 16: ...or Externally Powered USB packaged with your device or module and also available on ni com manuals contain step by step instructions for installing software and hardware configuring channels and tasks and getting started developing an application 3 Installing the hardware Unpack your M Series device as described in the Unpacking section Refer to the DAQ Getting Started Guide for PXI PXI Express DA...

Page 17: ...d reference voltage of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment Disconnect all external signals when you self calibrate a device Note NI PCIe 6251 6259 Devices Connecting or disconnecting the disk drive power connector on M Series PCI Express devices can affect the analog performance of your device To compe...

Page 18: ...are using an SCC accessory without an external power supply such as the SC 2345 Refer to the specifications document for your device for more information about PCI Express power requirements and power limits Disk Drive Power Connector Installation Before installing the disk drive power connector you must install and set up the M Series PCI Express device as described in the DAQ Getting Started Gui...

Page 19: ...ractices Applying the Signal Label to USB Screw Terminal Devices USB 622x 625x 628x Screw Terminal Devices The supplied signal label can be adhered to the inside cover of the USB 62xx Screw Terminal device with supplied velcro strips as shown in Figure 1 2 Figure 1 2 Applying the USB 62xx Screw Terminal Signal Label USB Device Chassis Ground USB 622x 625x 628x Devices For EMC compliance the chassi...

Page 20: ...1 4 The wire should be as short as possible Figure 1 4 Grounding a USB 62xx Screw Terminal Device through the Chassis Ground Lug USB 62xx BNC Devices You can attach a wire to a CHS GND screw terminal of any USB 62xx BNC device as shown in Figure 1 5 Use as short a wire as possible In addition the wires in the shielded cable that extend beyond the shield should be as short as possible Figure 1 5 Gr...

Page 21: ...USB 622x 625x 628x Mass Termination Devices Use the supplied strain relief hardware to provide strain relief for your USB cable Adhere the cable tie mount to the rear panel of the USB 62xx Screw Terminal or USB 62xx Mass Termination device as shown in Figure 1 6 Thread a zip tie through the cable tie mount and tighten around the USB cable Figure 1 6 USB Cable Strain Relief on USB 62xx Screw Termin...

Page 22: ...250V fuse that protects the device from overcurrent through the 5 V terminal s USB 622x 625x 628x Screw Terminal Devices To replace a broken fuse in the USB 62xx Screw Terminal complete the following steps 1 Power down and unplug the device 2 Remove the USB cable and all signal wires from the device 3 Loosen the four Phillips screws that attach the back lid to the enclosure and remove the lid 4 Re...

Page 23: ...x BNC Devices To replace a broken fuse in the USB 62xx BNC complete the following steps 1 Power down and unplug the device Note Take proper ESD precautions when handling the device 2 Remove the USB cable and all BNC cables and signal wires from the device 1 T 2A 250V 5 20 mm Fuse 2 Littelfuse 0453002 Fuse on USB 628x Devices 2 1 ...

Page 24: ...g of self threading screws will produce a compromised connection 4 With a Phillips 2 screwdriver remove the Phillips 4 40 screw adjacent to the USB connector 5 Remove the nut from the power connector 6 Remove the four Phillips 4 40 screws that attach the top panel to the enclosure and remove the panel and connector unit 7 Replace the broken fuse while referring to Figure 1 9 for the fuse location ...

Page 25: ...ns Figure 1 10 USB 62xx Mass Termination Fuse Locations 5 Replace the lid and screws USB Device Security Cable Slot USB 622x 625x BNC Devices The security cable slot shown in Figure 1 7 allows you to attach an optional antitheft device to your USB device Note The security cable is designed to act as a deterrent but may not prevent the device from being mishandled or stolen For more information ref...

Page 26: ... 11 Installing the Ferrite on the Power Cable Pinouts Refer to Appendix A Module Device Specific Information for M Series device pinouts Specifications Refer to the device specifications document for your device M Series device documentation is available on ni com manuals Accessories and Cables NI offers a variety of accessories and cables to use with your multifunction I O DAQ module device Refer...

Page 27: ...nts of a Typical DAQ System DAQ Hardware DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 2 2 features components common to all M Series devices Figure 2 2 General M Series Block Diagram Sensors and Transducers Signal Conditioning DAQ Hardware Personal Computer or PXI PXI Express Chassis DAQ Software Cabl...

Page 28: ...ration Circuitry The M Series analog inputs and outputs have calibration circuitry to correct gain and offset errors You can calibrate the device to minimize AI and AO errors caused by time and temperature drift at run time No external circuitry is necessary an internal reference ensures high accuracy and stability over time and temperature changes Factory calibration constants are permanently sto...

Page 29: ...ssories or 37 Pin M Series Cables and Accessories For more specific information about these products refer to ni com Note For compliance with Electromagnetic Compatibility EMC requirements this product must be operated with shielded cables and accessories If unshielded cables or accessories are used the EMC specifications are no longer guaranteed unless all unshielded cables and or accessories are...

Page 30: ...EPM SHC68 68 Unshielded RC68 68 RC68 68 RC68 68 RC68 68 Accessories Shielded Screw Terminal Block SCB 68A SCB 68 TB 2706 SCB 68A SCB 68 SCB 68A SCB 68 SCB 68A SCB 68 BNC Terminal Block BNC 2110 BNC 2111 BNC 2120 BNC 2090A BNC 2090 BNC 2115 BNC 2110 BNC 2111 BNC 2120 BNC 2090A BNC 2090 BNC 2115 SCC SC 2345 SC 2350 SCC 68 N A SC 2345 SC 2350 SCC 68 N A Unshielded Screw Terminal Block CB 68LP CB 68LP...

Page 31: ...6284 6289 devices and modules RC68 68 Highly flexible unshielded ribbon cable USB Mass Termination Device 68 Pin Cables You can use the following cables with USB devices with mass termination connectors SH68 68 EPM2 Recommended High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pa...

Page 32: ...w terminal accessories SCB 68A SCB 68 Shielded connector block with temperature sensor TB 27061 Front panel mounted terminal block for PXI PXI Express M Series devices SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules TBX 68 DIN rail mountable connector block CB 68LP CB 68LPR Unshielded connector block...

Page 33: ...that support track and hold you must programmatically disable track and hold You also can use an M Series PXI module to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the documentation for your SCXI chassis and modules for detailed inform...

Page 34: ...escribes some cable and accessory options for the PCI 6221 37 pin device Refer to the following sections for descriptions of these cables and accessories Refer to ni com for other accessory options Table 2 2 USB Device Cabling Accessories and Power Supply Description Part Number NI USB DAQ Power Supply 780046 01 Externally Powered USB M Series Panel Mounting Kit 780214 01 USB cable with locking sc...

Page 35: ...s CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required 37 Pin Custom Cabling NI offers cables and accessories for many applications However if you want to develop your own cable the following kits can assist you TB 37F 37SC 37 pin solder cup terminals shell with strain relief TB 37F 37CP 37 pin crimp p...

Page 36: ... thermocouples is very small and susceptible to noise Therefore you may need to amplify or filter the thermocouple output before digitizing it The manipulation of signals to prepare them for digitizing is called signal conditioning For more information about sensors refer to the following documents For general information about sensors visit ni com sensors If you are using LabVIEW refer to the Lab...

Page 37: ...nput and eight digital I O lines Low profile portable Integrates well with other laptop computer measurement technologies High bandwidth Acquire signals at rates up to 1 25 MHz Connectivity Incorporates panelette technology to offer custom connectivity to thermocouple BNC LEMO B Series and MIL Spec connectors Note PCI Express users should consider the power limits on certain SCC modules without an...

Page 38: ...mends using the latest version of NI DAQmx supported for your OS Refer to the NI DAQmx download page by going to ni com info and entering the Info Code nidaqmxdownloads Table 2 4 M Series NI DAQmx Software Support Device NI DAQmx Earliest Version Support NI PCI PXI 6220 6221 6224 6229 NI DAQmx 7 4 NI PCI 6221 37 pin NI DAQmx 7 5 NI USB 6221 6229 Screw Terminal NI DAQmx 8 3 NI USB 6221 6229 BNC NI ...

Page 39: ...t M Series connector signals power and user defined terminals The LED Patterns section contains information about M Series USB device LEDs Note Refer to Appendix A Module Device Specific Information for device I O connector pinouts I O Connector Signal Descriptions Table 3 1 describes the signals found on the I O connectors Not all signals are available on all devices ...

Page 40: ...For differential measurements AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 Similarly the following signal pairs also form differential input channels AI 1 AI 9 AI 2 AI 10 AI 3 AI 11 and so on Refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input AI SENSE AI SENSE 2 Input Analog Input Sense In NRSE mode the reference for each AI ...

Page 41: ...e functions are not available on all devices refer to the specifications for your device Refer to the APFI 0 1 Terminals section of Chapter 11 Triggering 5 V D GND Output 5 V Power Source These terminals provide a fused 5 V power source Refer to the 5 V Power Source section for more information PFI 0 7 P1 0 7 D GND Input or Output Programmable Function Interface or Port 1 Digital I O Channels Each...

Page 42: ... counter timer pins for most M Series devices USER 1 2 User Defined Channels On USB 62xx BNC devices the USER 1 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER 1 2 BNC connectors are internally routed to the USER 1 2 screw terminals Refer to the USER 1 and USER 2 section for more information CHS GND Chassis Ground This terminal connects ...

Page 43: ...condition occurs check your cabling to the 5 V terminals and replace the fuse as described in the USB Device Fuse Replacement section of Chapter 1 Getting Started Caution Never connect the 5 V power terminals to analog or digital ground or to any other voltage source on the M Series device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting fro...

Page 44: ...Figure 3 2 Connecting PFI 8 to USER 1 BNC The designated space below each USER BNC is for marking or labeling signal names USER 2 BNC D GND USER 1 P0 6 P0 5 P0 4 D GND P0 3 P0 2 P0 1 P0 0 D GND 5 V D GND USER 2 PFI 8 P2 0 P0 7 D GND Internal Connection USER 1 BNC D GND Screw Terminal Block BNC Cable PFI 8 Signal USER 1 P0 6 P0 5 P0 4 D GND P0 3 P0 2 P0 1 P0 0 D GND 5 V D GND USER 2 PFI 8 P2 0 P0 7...

Page 45: ...evice is configured Table 3 2 shows the behavior of the LEDs Note USB 62xx BNC devices also have a POWER 5 V LED on the top panel The POWER 5 V LED indicates device power Table 3 2 LED Patterns POWER 5 V LED ACTIVE LED READY LED USB Device State Off Off Off The device is not powered On Off Off USB 62xx Screw Terminal Mass Termination Devices The device is not powered USB 62xx BNC Devices The devic...

Page 46: ...ce Settings The analog input ground reference settings circuitry selects between differential referenced single ended and non referenced single ended input modes Each AI channel can use a different mode Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifier NI PGIA is a measurement and instrument class amplifier that minimizes settling times for all input ranges The N...

Page 47: ...ries device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 216 codes that is one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 10 V to 10 V the voltage of each code of a 16 bit ADC is M Series devices use a calibration method that requires...

Page 48: ...e if the signal of interest does not have frequency components beyond 40 kHz then using a filter with a cutoff frequency at 40 kHz attenuates noise beyond the cutoff that is not of interest The cutoff Table 4 1 M Series Input Range and Nominal Resolution M Series Devices Input Range Nominal Resolution Assuming 5 Over Range NI 622x 10 V to 10 V 320 µV 5 V to 5 V 160 µV 1 V to 1 V 32 µV 200 mV to 20...

Page 49: ...Overview Analog Input Ground Reference Settings M Series devices support the analog input ground reference settings Differential mode In DIFF mode the M Series device measures the difference in voltage between two AI signals Referenced single ended mode In RSE mode the M Series device measures the voltage of an AI signal relative to AI GND Non referenced single ended mode In NRSE mode the M Series...

Page 50: ...ument for your device Exceeding the maximum input voltage of AI signals distorts the measurement results Exceeding the maximum input voltage rating also can damage the device and the computer NI is not liable for any damage resulting from such signal connections Table 4 2 Signals Routed to the NI PGIA AI Ground Reference Settings Signals Routed to the Positive Input of the NI PGIA Vin Signals Rout...

Page 51: ...onsiderations M Series devices can scan multiple channels at high rates and digitize the signals accurately However you should consider several issues when designing your measurement system to ensure the high accuracy of your measurements In multichannel scanning applications accuracy is affected by settling time When your M Series device switches from one AI channel to another AI channel the devi...

Page 52: ... AI signals to the device Refer to the Connecting Analog Input Signals section for more information 3 Carefully Choose the Channel Scanning Order Avoid Switching from a Large to a Small Input Range Switching from a channel with a large input range to a channel with a small input range can greatly increase the settling time Suppose a 4 V signal is connected to channel 0 and a 1 mV signal is connect...

Page 53: ...eeds gives the NI PGIA more time to settle to a more accurate level Here are two examples to consider Example 1 Averaging many AI samples can increase the accuracy of the reading by decreasing noise effects In general the more points you average the more accurate the final result However you may choose to decrease the number of points you average and slow down the scanning rate Suppose you want to...

Page 54: ...c Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for to be generated samples Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC buffer using DMA or interrupts before it is transferred to application memory Buffered acquisitions typica...

Page 55: ...n the device Typically hardware timed non buffered operations are used to read single samples with known time increments between them Note NI USB 62xx Devices USB M Series devices do not support non buffered hardware timed operations Analog Input Triggering Analog input supports three different triggering actions Start trigger Reference trigger Pause trigger Refer to the AI Start Trigger Signal AI...

Page 56: ...nts with non isolated outputs Differential DIFF Non Referenced Single Ended NRSE Referenced Single Ended RSE Refer to the Analog Input Ground Reference Settings section for descriptions of the RSE NRSE and DIFF modes and software considerations Refer to the Connecting Ground Referenced Signal Sources section for more information AI AI AI GND Signal Source DAQ Device AI AI AI GND Signal Source DAQ ...

Page 57: ...l DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to the Using Differential Connections for Floating Signal Sources section for more information about differential connections When to Use Non Referenced Single Ended NRSE Connections with Floating Signal ...

Page 58: ...the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Referenced ...

Page 59: ...o both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the NI PGIA Figure 4 5 Differential Connections for Floating Signal Sources with Single Bias Resistor You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND ...

Page 60: ...ll enough not to produce significant input offset voltage as a result of input bias current typically 100 kΩ to 1 MΩ In this case connect the negative input directly to AI GND If the source has high output impedance balance the signal path as previously described using the same value resistor on both the positive and negative inputs be aware that there is some gain error from loading down the sour...

Page 61: ... of the bias resistor configurations discussed in the Using Differential Connections for Floating Signal Sources section apply to the NRSE bias resistors as well Replace AI with AI SENSE in Figures 4 4 4 5 4 6 and 4 7 for configurations with zero to two bias resistors The noise rejection of NRSE mode is better than RSE mode because the AI SENSE connection is made remotely near the source However t...

Page 62: ...ce connected to the building system ground It is already connected to a common ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non isolated outputs of instruments and devices that plug into the building power system fall into this category The difference in ground potential between two instruments connected to the same building...

Page 63: ...y use non referenced single ended input connections if the input signal meets the following conditions The input signal is high level greater than 1 V The leads connecting the signal to the device are less than 3 m 10 ft The input signal can share a common reference point with other signals DIFF input connections are recommended for greater signal integrity for any input signal that does not meet ...

Page 64: ... source to the M Series device configured in DIFF mode Figure 4 10 Differential Connections for Ground Referenced Signal Sources Note NI USB 62xx BNC Devices To measure a ground referenced signal source on USB BNC devices move the switch under the BNC connector to the GS position With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential diff...

Page 65: ...e input of the NI PGIA Therefore the ground point of the signal connects to the negative input of the NI PGIA Any potential difference between the device ground and the signal ground appears as a common mode signal at both the positive and negative inputs of the NI PGIA and this difference is rejected by the amplifier If the input circuitry of a device were referenced to ground as it is in the RSE...

Page 66: ...connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference Refer to the Field Wiring and Noise Considerations for Analog Signals document for more information To access this document go to ni com info and enter the Info Code rdfwn3 Analog Input Timing Signals In order to provide all of the timing functionality described throughout thi...

Page 67: ...ing rate is aggregate one channel at 250 kS s or two channels at 125 kS s per channel illustrates the relationship Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received A typical posttriggered DAQ sequence is shown in Figure 4 14 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decr...

Page 68: ...le counter value decrements until the specified number of posttrigger samples have been acquired M Series devices feature the following analog input timing signals AI Sample Clock Signal AI Sample Clock Timebase Signal AI Convert Clock Signal AI Convert Clock Timebase Signal AI Hold Complete Event Signal AI Start Trigger Signal AI Reference Trigger Signal AI Pause Trigger Signal AI Sample Clock Si...

Page 69: ... during the entire sample All PFI terminals are configured as inputs by default Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores AI Sample Clock when a measurement acquisition is not in progress During a measurement acquisition you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal A counter on your device inte...

Page 70: ...or AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge AI Convert Clock Signal Use the AI Convert Clock ai ConvertClock signal to initiate a single A D conversion on a single channel A sample controlled by the AI Sample Clock consists of one or more...

Page 71: ...ice will result in errors Using an Internal Source One of the following internal signals can drive AI Convert Clock AI Convert Clock Timebase divided down Counter n Internal Output A programmable internal counter divides down the AI Convert Clock Timebase to generate AI Convert Clock The counter is started by AI Sample Clock and continues to count down to zero produces an AI Convert Clock reloads ...

Page 72: ...tart Trigger signal Once the device recognizes an AI Sample Clock pulse it ignores subsequent AI Sample Clock pulses until it receives the correct number of AI Convert Clock pulses Similarly the device ignores all AI Convert Clock pulses until it recognizes an AI Sample Clock pulse Once the device receives the correct number of AI Convert Clock pulses it ignores subsequent AI Convert Clock pulses ...

Page 73: ... at the same time In this mode each tick of the external clock causes a conversion on the ADC Figure 4 22 shows this timing relationship Figure 4 22 One External Signal Driving Both Clocks Simultaneously AI Sample Clock AI Convert Clock Sample 1 Sample 2 Sample 3 1 2 3 0 1 2 3 0 1 2 3 0 Channel Measured AI Sample Clock AI Convert Clock Sample 1 Sample 2 Sample 3 1 2 3 0 0 Channel Measured 1 2 3 0 ...

Page 74: ...ed so that a low to high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed AI Start Trigger Signal Use the AI Start Trigger ai StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a measurement with a software command Once the acquisition b...

Page 75: ...riggered DAQ operation AI Reference Trigger Signal Use AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the num...

Page 76: ... also can specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger Using an Analog Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal Routing AI Reference Trigger Signal to an Output Terminal You can route AI Reference Trigger out to any PFI 0 15 or RTSI 0 7 terminal A...

Page 77: ... the signal goes high or vice versa Routing AI Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to RTSI 0 7 Note Pause triggers are only sensitive to the level of the source not the edge Getting Started with AI Applications in Software You can use the M Series device in the following analog input applications Single point analog input Finite analog input Continuous ana...

Page 78: ...alog output circuitry are as follows DACs Digital to analog converters DACs convert digital codes to analog voltages AO FIFO The AO FIFO enables analog output waveform generation It is a first in first out FIFO memory buffer between the computer and the DACs It allows you to download the points of a waveform to your M Series device without host computer interaction AO Sample Clock The AO Sample Cl...

Page 79: ...set is always 0 V AO GND The AO reference of each analog output AO 0 3 can be individually set to one of the following 10 V 5 V APFI 0 1 You can connect an external signal to APFI 0 1 to provide the AO reference The AO reference can be a positive or negative voltage If AO reference is a negative voltage the polarity of the AO output is inverted The valid ranges of APFI 0 1 are listed in the device...

Page 80: ...utput Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code changes You can build a lowpass deglitching filter to remove some of these glitches depending on the freque...

Page 81: ...a samples Once the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These ...

Page 82: ...es support digital triggering but some do not support analog triggering To find your device s triggering options refer to the specifications document for your device Refer to the AO Start Trigger Signal and AO Pause Trigger Signal sections for more information about these triggering actions Connecting Analog Output Signals AO 0 3 are the voltage output signals for AO channels 0 1 2 and 3 AO GND is...

Page 83: ...triggers you can begin a generation with a software command Using a Digital Source To use AO Start Trigger specify a source and an edge The source can be one of the following signals A pulse initiated by host software PFI 0 15 RTSI 0 7 AI Reference Trigger ai ReferenceTrigger AI Start Trigger ai StartTrigger PXI_STAR The source also can be one of several internal signals on your DAQ device Refer t...

Page 84: ...useTrigger signal to mask off samples in a DAQ sequence That is when AO Pause Trigger is active no samples occur AO Pause Trigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample When you generate analog output signals the generation pauses as soon as the pause trigger is asserted If the source of your sample clock is the onboard cloc...

Page 85: ... of Chapter 11 Triggering for more information Routing AO Pause Trigger Signal to an Output Terminal You can route AO Pause Trigger out to RTSI 0 7 AO Sample Clock Signal Use the AO Sample Clock ao SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs You can specify an internal or external source for AO Sample Clock You also can specify whether the DAC updat...

Page 86: ... AO Start Trigger to the first AO Sample Clock pulse By default this delay is two ticks of AO Sample Clock Timebase Figure 5 6 shows the relationship of AO Sample Clock to AO Start Trigger Figure 5 6 AO Sample Clock and AO Start Trigger AO Sample Clock Timebase Signal The AO Sample Clock Timebase ao SampleClockTimebase signal is divided down to provide a source for AO Sample Clock You can route an...

Page 87: ...tting Started with AO Applications in Software You can use an M Series device in the following analog output applications Single point on demand generation Finite generation Continuous generation Waveform generation You can perform these generations through programmed I O interrupt or DMA data transfer mechanisms Some of the applications also use start triggers and pause triggers Note For more inf...

Page 88: ...output High speed digital waveform generation High speed digital waveform acquisition DI change detection trigger interrupt Figure 6 1 shows the circuitry of one DIO line Each DIO line is similar The following sections provide information about the various parts of the DIO circuit Figure 6 1 M Series Digital I O Circuitry The DIO terminals are named P0 0 31 on the M Series device I O connector DO ...

Page 89: ...gnal to be the source of DI Sample Clock or DO Sample Clock Then generate a trigger that initiates pulses on the source signal The method for generating this trigger depends on which signal is the source of DI Sample Clock or DO Sample Clock For example consider the case where you are using AI Sample Clock as the source of DI Sample Clock To initiate pulses on AI Sample Clock and therefore on DI S...

Page 90: ... Therefore you must route an external signal or one of many internal signals from another subsystem to be the DI Sample Clock For example you can correlate digital and analog samples in time by sharing your AI Sample Clock or AO Sample Clock as the source of your DI Sample Clock To sample a digital signal independent of an AI AO or DO operation you can configure a counter to generate the desired D...

Page 91: ...fter all the samples in the FIFO have been clocked out the FIFO begins outputting all of the samples again in the same order For example if the FIFO contains five samples the pattern generated consists of sample 1 2 3 4 5 1 2 3 4 5 1 and so on M Series devices feature the DO Sample Clock Signal digital output timing signal DO Sample Clock Signal Use the DO Sample Clock do SampleClock signal to upd...

Page 92: ...wo active edges of DO Sample Clock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sample fast enough The DAQ device reports an overrun error to the host software Routing DO Sample Clock to an Output Terminal You can route DO Sample Clock out to any PFI terminal The PFI circuitry inverts the polarity of DO Sample Clock before driving the PFI t...

Page 93: ...he signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO lines Software can program any value at power up to the P0 P1 or P2 lines The PFI and DIO lines can be set as A high impedance input with a weak pull down resistor default An output driving a 0 An ou...

Page 94: ...idually on each DIO line The DAQ devices synchronize each DI signal to 80MHzTimebase and then sends the signal to the change detectors The circuitry ORs the output of all enabled change detectors from every DI signal The result of this OR is the Change Detection Event signal The Change Detection Event signal can do the following Drive any RTSI 0 7 PFI 0 15 or PXI_STAR signal Drive the DO Sample Cl...

Page 95: ...igital I O Signals The DIO signals P0 0 31 P1 0 7 and P2 0 7 are referenced to D GND You can individually program each line as an input or output Figure 6 4 shows P1 0 3 configured for digital input and P1 4 7 configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output a...

Page 96: ...Series device in the following digital I O applications Static digital input Static digital output Digital waveform generation Digital waveform acquisition DI change detection Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help ...

Page 97: ...information about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Input Applications The following sections list the various counter input applications available on M Series devices Counting Edges Pulse Width Measurement Period Measurement Semi Period Measurement Counter 0 Counter 0 Source Counter 0 Timebase Counter 0 Aux Counter 0 HW Arm Counter 0 A Counter 0...

Page 98: ... the Source input after the counter is armed On demand refers to the fact that software can read the counter contents at any time without disturbing the counting process Figure 7 2 shows an example of single point edge counting Figure 7 2 Single Point On Demand Edge Counting You also can use a pause trigger to pause or gate the counter When the pause trigger is active the counter ignores edges on ...

Page 99: ...re the first active edge on Gate Figure 7 4 Buffered Sample Clock Edge Counting Controlling the Direction of Counting In edge counting applications the counter can count up or down You can configure the counter to do the following Always count up Always count down Count up when the Counter n B input is high count down when it is low For information about connecting counter signals refer to the Def...

Page 100: ...s the number of edges on the Source input while the Gate input remains active When the Gate input goes inactive the counter stores the count in a hardware save register and ignores other edges on the Gate and Source inputs Software then reads the stored count Figure 7 5 shows an example of a single pulse width measurement Figure 7 5 Single Pulse Width Measurement Buffered Pulse Width Measurement B...

Page 101: ...ing edges of the Gate input signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between the two active edges of the Gate signal You can calculate the period of the Gate input by multiplying the period of the Source signal by the number of edge...

Page 102: ...ally occurs in the middle of a period of the Gate input So the first value stored in the hardware save register does not reflect a full period of the Gate input In most applications this first point should be discarded Figure 7 8 shows an example of a buffered period measurement Figure 7 8 Buffered Period Measurement Note that if you are using an external signal as the Source at least one Source p...

Page 103: ...o the following sections for more information about M Series semi period measurement options Single Semi Period Measurement Buffered Semi Period Measurement Single Semi Period Measurement Single semi period measurement is equivalent to single pulse width measurement Buffered Semi Period Measurement In buffered semi period measurement on each edge of the Gate signal the counter stores the count in ...

Page 104: ...h Frequency with Two Counters Large Range of Frequencies with Two Counters Refer to the Choosing a Method for Measuring Frequency section for a detailed comparison of these frequency measurement methods Low Frequency with One Counter In this method you measure one period of your signal using a known timebase This method is good for low frequency signals You can route the signal to measure F1 to th...

Page 105: ...iod Figure 7 11 illustrates this method Figure 7 11 Low Frequency with One Counter Averaged High Frequency with Two Counters In this method you measure one pulse of a known width using your signal and derive the frequency of your signal from the result This method is good for high frequency signals In this method you route a pulse of known duration T to the Gate of a counter You can generate the p...

Page 106: ...base The M Series device can measure this long pulse more accurately than the faster input signal You can route the signal to measure to the Source input of Counter 0 as shown in Figure 7 13 Assume this signal to measure has frequency F1 Configure Counter 0 to generate a single pulse that is the width of N periods of the source input signal Figure 7 13 Large Range of Frequencies with Two Counters ...

Page 107: ...s the frequency to be measured if no error fk is the known source or gate frequency Measurement time T is the time it takes to measure a single sample Divide down N is the integer to divide down measured frequency only used in large range two counters Here is how these variables apply to each method summarized in Table 7 1 One counter With one counter measurements a known timebase is used for the ...

Page 108: ...Counters Averaged High Frequency Large Range fk Known timebase Known timebase Known timebase T gating period Maximum frequency error Hz fk Maximum error Note Accuracy equations do not take clock stability into account Refer to your device specifications for clock stability Table 7 2 50 kHz Frequency Measurement Methods Variable One Counter Two Counters Averaged High Frequency Large Range fx 50 000...

Page 109: ...dvantage of this method is that it requires only one counter Disadvantages include the possibility of FIFO overflow at high frequencies and high N for this method These measurements take more time and consume some of the available PCI or PXI Maximum frequency error Hz 25 0 5 1 000 0 5 Maximumerror 0 05 0 001 2 0 001 Table 7 3 5 MHz Frequency Measurement Methods Variable One Counter Two Counters Av...

Page 110: ... counters and it has a variable sample time and variable error percent dependent on the input signal Table 7 4 summarizes some of the differences in methods of measuring frequency For information about connecting counter signals refer to the Default Counter Timer Pinouts section Position Measurement You can use the counters to perform position measurements with quadrature encoders or two pulse enc...

Page 111: ...cle and the resulting increments and decrements for X1 encoding When channel A leads channel B the increment occurs on the rising edge of channel A When channel B leads channel A the decrement occurs on the falling edge of channel A Figure 7 14 X1 Encoding X2 Encoding The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A depending on which ch...

Page 112: ...igure 7 17 the reload phase is when both channel A and channel B are low The reload occurs when this phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when the channel B goes low to enter the reload phase the increment occurs first The reload occurs within one maximum timebase period after the reload phase becomes true After the reload occurs the ...

Page 113: ...lse width measurement except that there are two measurement signals Aux and Gate An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting You must arm a counter to begin a two edge separation measurement After the counter has been armed and an active edge occurs on the Aux input the counter counts the number of rising or falling edges on the Sourc...

Page 114: ...gure 7 20 Single Two Signal Edge Separation Measurement Buffered Two Signal Edge Separation Measurement Buffered and single two signal edge separation measurements are similar but buffered measurement measures multiple intervals The counter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The c...

Page 115: ... Generation with Start Trigger Retriggerable Single Pulse Generation Single Pulse Generation The counter can output a single pulse The pulse appears on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse The delay is measured in terms of a number of active edges of the Source input You can specify a pulse width Th...

Page 116: ...Pulse Generation The counter can output a single pulse in response to each pulse on a hardware Start Trigger signal The pulses appear on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of each pulse You also can specify the pulse width The delay and pulse widt...

Page 117: ...ou also can specify the active edge of the Source input rising or falling The counter can begin the pulse train generation as soon as the counter is armed or in response to a hardware Start Trigger You can route the Start Trigger to the Gate input of the counter You also can use the Gate input of the counter as a Pause Trigger if it is not used as a Start Trigger The counter pauses pulse generatio...

Page 118: ...r can output a square wave at many different frequencies The frequency generator is independent of the two general purpose 32 bit counter timer modules on M Series devices Figure 7 27 shows a block diagram of the frequency generator Figure 7 27 Frequency Generator Block Diagram The frequency generator generates the Frequency Output signal The Frequency Output signal is the Frequency Output Timebas...

Page 119: ...uts section Pulse Generation for ETS In the equivalent time sampling ETS application the counter produces a pulse on the output a specified delay after an active edge on Gate After each active edge on Gate the counter cumulatively increments the delay between the Gate and the pulse on the output by a specified amount Thus the delay between the Gate and the pulse produced successively increases The...

Page 120: ...M Series devices feature the following counter timing signals Counter n Source Signal Counter n Gate Signal Counter n Aux Signal Counter n A Signal Counter n B Signal Counter n Z Signal Counter n Up_Down Signal Counter n HW Arm Signal Counter n Internal Output Signal Counter n TC Signal Frequency Output Signal In this section n refers to either Counter 0 or 1 For example Counter n Source refers to...

Page 121: ...vailable in some driver software Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI 0 15 or RTSI 0 7 terminal All PFIs are set to high impedance at startup Counter n Gate Signal The Counter n Gate signal can perform many different operations depending on the application including starting and stopping the counter and saving the counter contents Table 7 5 C...

Page 122: ...r 1 Source can be routed to Counter 0 Gate Counter 0 Internal Output or Counter 0 Source can be routed to Counter 1 Gate Some of these options may not be available in some driver software Routing Counter n Gate to an Output Terminal You can route Counter n Gate out to any PFI 0 15 or RTSI 0 7 terminal All PFIs are set to high impedance at startup Counter n Aux Signal The Counter n Aux signal indic...

Page 123: ...Signal to an Output Terminal You can route Counter n Z out to RTSI 0 7 Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal Counter n HW Arm Signal The Counter n HW Arm signal enables a counter to begin an input or output function To begin any counter input or output function you must first enable or arm the counter In some applications such as buffered semi period...

Page 124: ...l Output signal can be internally routed to be a counter timer input or an external source for AI AO DI or DO timing signals Routing Counter n Internal Output to an Output Terminal You can route Counter n Internal Output to any PFI 0 15 or RTSI 0 7 terminal All PFIs are set to high impedance at startup Frequency Output Signal The Frequency Output FREQ OUT signal is the output of the frequency outp...

Page 125: ...ter input or output function you must first enable or arm the counter Software can arm a counter or configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter ArmStart DigEdge Edge is not supported on M Series devices and modules Table 7 6 68 Pin Device D...

Page 126: ...on applications For edge counting acquisitions the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generations the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa When using a pause trigger the pause trigger source is routed to ...

Page 127: ...introduces jitter on the input signal For the 125 ns and 6 425 µs filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 µs When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and Compact...

Page 128: ...g counter cannot be read therefore you cannot determine how many edges have occurred since the previous rollover Prescaling can be used for event counting provided it is acceptable to have an error of up to seven or one Prescaling can be used when the counter Source is an external signal Prescaling is not available if the counter Source is one of the internal timebases 80MHzTimebase 20MHzTimebase ...

Page 129: ...next Source pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate The details of when exactly the counter synchronizes the Gate signal vary depending on the synchronization mode Synchronization modes are described in the Synchronization Modes section Example Application That Works Incorrectly Duplicate Counting In Figure 7 3...

Page 130: ...onously to the Source signal With duplicate count prevention the counter value and Counter n Internal Output signals change synchronously to the 80 MHz Timebase Note that duplicate count prevention should only be used if the frequency of the Source signal is 20 MHz or less When To Use Duplicate Count Prevention You should use duplicate count prevention if the following conditions are true You are ...

Page 131: ...er M Series devices use one of three synchronization methods 80 MHz Source Mode Other Internal Source Mode External Source Mode In DAQmx the device uses 80 MHz source mode if you perform the following Perform a position measurement Select duplicate count prevention Otherwise the mode depends on the signal that drives Counter n Source Table 7 8 describes the conditions for each mode Table 7 8 Synch...

Page 132: ... of the source and counts on the following rising edge of the source as shown in Figure 7 36 Figure 7 36 Other Internal Source Mode External Source Mode In external source mode the device generates a delayed Source signal by delaying the Source signal by several nanoseconds The device synchronizes signals on the rising edge of the delayed Source signal and counts on the following rising edge of th...

Page 133: ...counter timer functions Each PFI input also has a programmable debouncing filter Figure 8 1 shows the circuitry of one PFI line Each PFI line is similar Figure 8 1 M Series PFI Circuitry When a terminal is used as a timing input or output signal it is called PFI x where x is an integer from 0 to 15 When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O con...

Page 134: ...AO Sample Clock ao SampleClock AO Sample Clock Timebase ao SampleClockTimebase AO Pause Trigger ao PauseTrigger Counter input signals for either counter Source Gate Aux HW_Arm A B Z DI Sample Clock di SampleClock DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input is edge or level sensitive Exporting Timing Output Signals Using PFI ...

Page 135: ...gital input or a static digital output When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 x or PFI x P2 x In addition M Series devices have up to 32 lines of bidirectional DIO signals Connecting PFI Input Signals All PFI input connections are referenced to D GND Figure 8 2 shows this reference and how to conn...

Page 136: ...er to Table 8 1 The filter setting for each input can be configured independently On power up the filters are disabled Figure 8 3 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 Figure 8 3 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 µs filter settings the jitter is up to 25 ns On the 2 56 ms setting t...

Page 137: ...normal operating range The PFI or DIO lines have a smaller operating range than the AI signals Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs by default The D...

Page 138: ...ion sub systems use these signals to manage acquisitions and generations These signals can come from the following sources Your M Series device Other devices in your system through RTSI User input through the PFI terminals User input through the PXI_STAR terminal Routes and generates the main clock signals for the M Series device Clock Routing Figure 9 1 shows the clock routing circuitry of an M S...

Page 139: ... general purpose counter timers The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200 External Reference Clock The external reference clock can be used as a source for the internal timebases 80 MHz Timebase 20 MHz Timebase and 100 kHz Timebase on an M Series device By using the external reference clock you can synchronize the internal timebases to an external clock The foll...

Page 140: ...receive the 10 MHz reference clock from RTSI or PFI This signal becomes the external reference clock A PLL on each device generates the internal timebases synchronous to the external reference clock Once all of the devices are using or referencing a common timebase you can synchronize operations across them by sending a common start trigger out across the RTSI or PFI bus and setting their sample c...

Page 141: ... bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer In a PXI PXI Express system the RTSI bus consists of the RTSI bus interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as...

Page 142: ...r ai PauseTrigger AO Sample Clock ao SampleClock AO Start Trigger ao StartTrigger AO Pause Trigger ao PauseTrigger 10 MHz Reference Clock Counter n Source Gate Z Internal Output Change Detection Event Analog Comparison Event FREQ OUT PFI 0 5 Note Signals with a are inverted before being driven on the RTSI terminals Table 9 1 RTSI Signals RTSI Bus Signal Terminal RTSI 7 34 RTSI 6 32 RTSI 5 30 RTSI ...

Page 143: ...ebase ao SampleClockTimebase AO Pause Trigger ao PauseTrigger Counter input signals for either counter Source Gate Aux HW_Arm A B or Z DI Sample Clock di SampleClock DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input is edge or level sensitive RTSI Filters You can enable a programmable debouncing filter on each PFI RTSI or PXI_STAR...

Page 144: ... 425 µs filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 µs When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counter...

Page 145: ...ted trigger line between the first peripheral slot adjacent to the system slot and the other peripheral slots The Star Trigger can be used to synchronize multiple devices or to share a common trigger signal among devices A Star Trigger controller can be installed in this first peripheral slot to provide trigger signals to other peripheral modules Systems that do not require this functionality can ...

Page 146: ... 425 µs filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 µs When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counter...

Page 147: ... following sections for information about bus interface data transfer methods for M Series devices PCI PCI Express Device and PXI PXI Express Module Data Transfer Methods The primary ways to transfer data across the PCI bus are as follows Direct Memory Access DMA DMA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fas...

Page 148: ... freeze Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information Note On PCI PCI Expres...

Page 149: ...Data Transfer Mechanism property node function in NI DAQmx PXI Considerations PXI clock and trigger signals are only available on PXI devices PXI Clock and Trigger Signals Refer to the PXI_CLK10 PXI Triggers PXI_STAR Trigger and PXI_STAR Filters sections of Chapter 9 Digital Routing and Clock Generation for more information about PXI clock and trigger signals PXI and PXI Express NI PXI M Series de...

Page 150: ...Series device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard implementation for CompactPCI does n...

Page 151: ...ll M Series devices support analog triggering For more information about triggering compatibility refer to the specifications document for your device Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI RTSI or PXI_STAR signals The edge can be either the rising edge or falling edg...

Page 152: ...d for other functions such as the AO External Reference input as described in the AO Offset and AO Reference Selection section of Chapter 5 Analog Output Analog Input Channels Select any analog input channel to drive the NI PGIA The NI PGIA amplifies the signal as determined by the input ground reference setting and the input range The output of the NI PGIA then drives the analog trigger detection...

Page 153: ... perform an action in response to the Analog Comparison Event signal The action can affect the following Analog input acquisition Analog output generation Counter behavior Routing Analog Comparison Event to an Output Terminal You can route Analog Comparison Event out to any PFI 0 15 or RTSI 0 7 terminal Analog Trigger Types Configure the analog trigger circuitry to different triggering modes Analo...

Page 154: ...a rising slope you specify a trigger level and amount of hysteresis The high threshold is the trigger level the low threshold is the trigger level minus the hysteresis For the trigger to assert the signal must first be below the low threshold then go above the high threshold The trigger stays asserted until the signal returns below the low threshold The output of the trigger detection circuitry is...

Page 155: ...omparison Event signal as shown in Figure 11 6 Figure 11 6 Analog Edge Triggering with Hysteresis Falling Slope Example Analog Window Triggering An analog window trigger occurs when an analog signal either passes into enters or passes out of leaves a window defined by two voltage levels Specify the levels by setting the window Top value and the window Bottom value Figure 11 7 demonstrates a trigge...

Page 156: ...NI PGIA amplifies the AI channel signal before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the input signal Software calibrate the analog trigger circuitry The propagation delay from when a valid trigger condition is met to when the analog trigger circuitry emits the Analog Comparison Event may ha...

Page 157: ...s devices NI 6220 NI 6221 68 Pin NI PCI 6221 37 Pin NI 6224 NI 6225 NI 6229 NI 6250 NI 6251 NI 6254 NI 6255 NI 6259 NI 6280 NI 6281 NI 6284 NI 6289 To obtain documentation for devices not listed here refer to ni com manuals Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to Appendix D Upgrading from E Series to M...

Page 158: ...AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 NC NC NC AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 ...

Page 159: ...e Specifications Refer to the NI 6220 Specifications for more detailed information about the PCI PXI 6220 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 1 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 P...

Page 160: ...Device Specific Information NI 6221 68 Pin The following sections contain information about the PCI PXI 6221 USB 6221 Screw Terminal and USB 6221 BNC PCI PXI 6221 PCI PXI 6221 Pinout Figure A 2 shows the pinout of the PCI PXI 6221 ...

Page 161: ...GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 NC AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 1...

Page 162: ...device Specifications Refer to the NI 6221 Specifications for more detailed information about the PCI PXI 6221 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 2 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX...

Page 163: ... 4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND NC AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND AI 2 AI 2 AI 10 AI 2 AI GND AI 3 AI 3 AI 11 AI 3 AI GND AI SENSE AI GND AO 0 AO GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D ...

Page 164: ... USB 6221 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6221 Screw Terminal Accessory Options Refer to the USB Device Accessories US...

Page 165: ... National Instruments A 9 M Series User Manual USB 6221 BNC USB 6221 BNC Pinout Figure A 4 shows the pinout of the USB 6221 BNC Figure A 4 USB 6221 BNC Top Panel and Pinout ...

Page 166: ...D Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6221 BNC Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System...

Page 167: ... OUT 17 PFI 6 CTR 0 A 13 PFI 0 CTR 0 Z 32 PFI 1 CTR 0 B 33 PFI 2 CTR 1 SRC 15 PFI 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 AI 0 AI 0 AI 9 AI 1 AI GND AI 10 AI 2 AI 3 AI 3 AI 4 AI 4 AI 13 AI 5 AI SENSE AI 14 AI 6 AI 15 AI 7 AO GND AO 0 PFI 0 P1 0 D GND PFI 3 P1 3 D GND PFI 6 P1 6 D GND P0 1 AI 8 AI 0 AI 1 AI 1 AI 2 AI 2 AI 11 AI 3 AI GN...

Page 168: ...rtant Links The following list contains links specific to your DAQ device Specifications Refer to the NI 6221 37 Pin Specifications for more detailed information about the PCI 6221 37 pin device Accessory and Cabling Options Refer to the 37 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information CTR 1 GATE 34 PFI 4 CTR 1 AUX 35 PFI 5 CTR 1 OUT 36 PFI 7 CTR...

Page 169: ...60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 NC NC NC P0 12 D GND P0 9 P0 14 D GND 5 V D GND D GND P0 16 P0 17 D GND 5 V D GND P0 21 P0 22 D GND P0 25 P0 28 P0 30 AI 16 AI 16...

Page 170: ... Specifications Refer to the NI 6224 Specifications for more detailed information about the PCI PXI 6224 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 6 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR...

Page 171: ...AI 64 AI 64 AI 73 AI 65 AI 74 AI 66 AI 67 AI 67 AI 76 AI 68 AI 77 AI 69 AI 70 AI 70 AI 79 AI 71 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 TERMINAL 34 TERMINAL 68 TERMINAL 35 TERMINAL 1 TERMINAL 35 TERMINAL 1 TERMINAL 34 TERMINAL 68 CONNECTOR 0 AI ...

Page 172: ... Specifications Refer to the NI 6225 Specifications for more detailed information about the PCI PXI 6225 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 7 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR...

Page 173: ...22 AI 22 AI GND AI 23 AI 23 AI 32 AI 32 AI 33 AI 33 AI 34 AI 34 AI 35 AI 35 AI 36 AI 36 AI GND AI 37 AI 37 AI 38 AI 38 AI 39 AI 39 AI 48 AI 48 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 AI 57 AI 49 AI 58 AI 50 AI 59 AI 51 AI 60 AI 52 AI 61 AI 53 AI 62 AI 54 AI 63 AI 55 AI GND AI 72 AI 64 AI 73 AI 65 AI 74 AI 66 AI 75 AI 67 AI 76 AI 68 AI 77 AI 6...

Page 174: ...ns section of Chapter 3 Connector and LED Information for information about the USB 6225 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6225 Screw Terminal Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System Overview fo...

Page 175: ...8 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 NC No Connect AI 79 AI 71 AI 70 AI 70 AI 77 AI 69 AI 76 AI 68 AI 67 AI 67 AI 74 AI 66 AI 73 AI 65 AI 64 AI 64 AI GND AI 63 AI 55 AI 62 AI 54 AI 53 AI 53 AI 60 AI 52 AI 59 AI 51 AI 50 AI 50 AI 57 AI 49 AI 56 AI 48 AI 39 AI 39 AI 46 AI 38 AI 45 AI 37 AI 36 AI 36 AI SE...

Page 176: ...to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6225 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6225 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 ...

Page 177: ... 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 AO 2 AO 3 NC P0 12 D GND P0 9 P0 14 D GND 5 V D GND D GND P0 16 P0 1...

Page 178: ... Specifications Refer to the NI 6229 Specifications for more detailed information about the PCI PXI 6229 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 10 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CT...

Page 179: ...GND NC AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND ...

Page 180: ... Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6229 Screw Terminal Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System Over...

Page 181: ... National Instruments A 25 M Series User Manual USB 6229 BNC USB 6229 BNC Pinout Figure A 12 shows the pinout of the USB 6229 BNC Figure A 12 USB 6229 BNC Top Panel and Pinout ...

Page 182: ... Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6229 BNC Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System ...

Page 183: ... AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 NC NC AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 2...

Page 184: ...device Specifications Refer to the NI 6250 Specifications for more detailed information about the PCI PXI 6250 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 13 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AU...

Page 185: ... 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI...

Page 186: ...ed information about the NI PCI PCIe PXI PXIe 6251 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information PCI Express Disk Drive Power Connector Refer to the RTSI Connector Pinout section of Chapter 3 Connector and LED Information for more information Table A 14 Default NI DAQmx Counter Timer Pins Count...

Page 187: ... 30 31 32 AI 4 AI 4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND APFI 0 AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND AI 2 AI 2 AI 10 AI 2 AI GND AI 3 AI 3 AI 11 AI 3 AI GND AI SENSE AI GND AO 0 AO GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1...

Page 188: ...about the USB 6251 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6229 Screw Terminal Accessory Options Refer to the USB Device Acces...

Page 189: ... National Instruments A 33 M Series User Manual USB 6251 BNC USB 6251 BNC Pinout Figure A 16 shows the pinout of the USB 6251 BNC Figure A 16 USB 6251 BNC Top Panel and Pinout ...

Page 190: ... Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6251 BNC Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System ...

Page 191: ...11 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI G...

Page 192: ...Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6229 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chap...

Page 193: ... 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 NC NC APFI 1 P0 12 D GND P0 9 P0 14 D GND 5 V D GND D GND P0 16 P0 17 D GND 5 V D GND P0 21 P0 22 D GND P0 25 P0 28 P0 30 AI 16 ...

Page 194: ... Specifications Refer to the NI 6254 Specifications for more detailed information about the PCI PXI 6254 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 18 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CT...

Page 195: ...I 64 AI 64 AI 73 AI 65 AI 74 AI 66 AI 67 AI 67 AI 76 AI 68 AI 77 AI 69 AI 70 AI 70 AI 79 AI 71 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 TERMINAL 34 TERMINAL 68 TERMINAL 35 TERMINAL 1 TERMINAL 35 TERMINAL 1 TERMINAL 34 TERMINAL 68 CONNECTOR 0 AI 0...

Page 196: ... Specifications Refer to the NI 6255 Specifications for more detailed information about the PCI PXI 6255 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 19 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CT...

Page 197: ... AI 21 AI 22 AI 22 AI GND AI 23 AI 23 AI 32 AI 32 AI 33 AI 33 AI 34 AI 34 AI 35 AI 35 AI 36 AI 36 AI GND AI 37 AI 37 AI 38 AI 38 AI 39 AI 39 AI 48 AI 48 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 AI 57 AI 49 AI 58 AI 50 AI 59 AI 51 AI 60 AI 52 AI 61 AI 53 AI 62 AI 54 AI 63 AI 55 AI GND AI 72 AI 64 AI 73 AI 65 AI 74 AI 66 AI 75 AI 67 AI 76 AI 68 ...

Page 198: ...ns section of Chapter 3 Connector and LED Information for information about the USB 6255 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6255 Screw Terminal Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System Overview fo...

Page 199: ...26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 79 AI 71 AI 70 AI 70 AI 77 AI 69 AI 76 AI 68 AI 67 AI 67 AI 74 AI 66 AI 73 AI 65 AI 64 AI 64 AI GND AI 63 AI 55 AI 62 AI 54 AI 53 AI 53 AI 60 AI 52 AI 59 AI 51 AI 50 AI 50 AI 57 AI 49 AI 56 AI 48 AI 39 AI 39 AI 46 AI 38 AI 45 AI 37 AI 36 AI 36 AI SENSE ...

Page 200: ...efer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6255 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6255 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapt...

Page 201: ... AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 AO 2 AO ...

Page 202: ...ormation about the NI PCI PCIe PXI PXIe 6259 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information PCI Express Disk Drive Power Connector Refer to the RTSI Connector Pinout section of Chapter 3 Connector and LED Information for more information Table A 22 Default NI DAQmx Counter Timer Pins Counter Tim...

Page 203: ...I 31 AI 23 AI GND APFI 1 AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND ...

Page 204: ... Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6259 Screw Terminal Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System Over...

Page 205: ... National Instruments A 49 M Series User Manual USB 6259 BNC USB 6259 BNC Pinout Figure A 24 shows the pinout of the USB 6259 BNC Figure A 24 USB 6259 BNC Top Panel and Pinout ...

Page 206: ... Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 BNC LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6259 BNC Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System ...

Page 207: ...AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 D GND D GND P0 24 P0 23 P0 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 P0 11 P0 15 P0 10 D GND P0 13 P0 8 D GND...

Page 208: ...to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6259 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 ...

Page 209: ... AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 NC NC AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 2...

Page 210: ...device Specifications Refer to the NI 6280 Specifications for more detailed information about the PCI PXI 6280 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 26 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AU...

Page 211: ... GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 ...

Page 212: ...device Specifications Refer to the NI 6281 Specifications for more detailed information about the PCI PXI 6281 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 27 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AU...

Page 213: ... 30 31 32 AI 4 AI 4 AI 12 AI 4 AI GND AI 5 AI 5 AI 13 AI 5 AI GND AI 6 AI 6 AI 14 AI 6 AI GND AI 7 AI 7 AI 15 AI 7 AI GND APFI 0 AI GND AO 1 AO GND AI 0 AI 0 AI 8 AI 0 AI GND AI 1 AI 1 AI 9 AI 1 AI GND AI 2 AI 2 AI 10 AI 2 AI GND AI 3 AI 3 AI 11 AI 3 AI GND AI SENSE AI GND AO 0 AO GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1...

Page 214: ...about the USB 6281 Screw Terminal device LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6259 Screw Terminal Accessory Options Refer to the USB Device Acces...

Page 215: ...11 P2 3 P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AI GND AI 7 AI 7 AI 14 AI 6 AI GND AI 5 AI 5 AI 12 AI 4 AI SENSE AI 11 AI 3 AI GND AI 2 AI 2 AI 9 AI 1 AI GND AI 0 AI 0 PFI 14 P2 6 PFI 9 P2 1 D GND PFI 5 P1 5 D GND 5 V D GND PFI 12 P2 4 PFI 6 P1 6 PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 APFI 0 AO 1 AO 0 AI 15 AI 7 AI GND AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI G...

Page 216: ...Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6281 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chap...

Page 217: ...0 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 NC NC APFI 1 P0 12 D GND P0 9 P0 14 D GND 5 V D...

Page 218: ...cific to your DAQ device Specifications Refer to the NI 6284 Specifications for more detailed information about the PCI PXI 6284 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information CTR 0 OUT 2 PFI 12 CTR 0 A 37 PFI 8 CTR 0 Z 3 PFI 9 CTR 0 B 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 4...

Page 219: ...0 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 AI 24 AI 16 AI 17 AI 17 AI GND AI 26 AI 18 AI 19 AI 19 AI GND AI 20 AI 20 AI GND AI 29 AI 21 AI 22 AI 22 AI GND AI 31 AI 23 AO 2 AO 3 APFI 1 P0 12 D GND P0 9 P0 14 D GND 5...

Page 220: ... Specifications Refer to the NI 6289 Specifications for more detailed information about the PCI PXI 6289 device Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 DAQ System Overview for more information Table A 31 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Connector 0 Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CT...

Page 221: ...I 31 AI 23 AI GND APFI 1 AI GND AO 3 AO GND AI 16 AI 16 AI 24 AI 16 AI GND AI 17 AI 17 AI 25 AI 17 AI GND AI 18 AI 18 AI 26 AI 18 AI GND AI 19 AI 19 AI 27 AI 19 AI GND AI SENSE 2 AI GND AO 2 AO GND 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND ...

Page 222: ... Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Screw Terminal LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6289 Screw Terminal Accessory Options Refer to the USB Device Accessories USB Cable and Power Supply section of Chapter 2 DAQ System Over...

Page 223: ...AI 6 AI 6 AI 13 AI 5 AI GND AI 4 AI 4 AI GND AI 3 AI 3 AI 10 AI 2 AI GND AI 1 AI 1 AI 8 AI 0 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 D GND D GND P0 24 P0 23 P0 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 P0 11 P0 15 P0 10 D GND P0 13 P0 8 D GND...

Page 224: ...to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Mass Termination LEDs Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 1 Getting Started for information about replacing the fuse on the USB 6289 Mass Termination Accessory and Cabling Options Refer to the 68 Pin M Series Cables and Accessories section of Chapter 2 ...

Page 225: ...t timing engine Input Timing Input timing relates to any signal external to the M Series device that is used as a clock or a trigger This timing describes the delays involved with importing the external signal into the device Internal Timing Internal timing describes the relationship between internal signals In general how the input and other internal signals get used to generate output signals su...

Page 226: ... Convert Clock signal Sync Convert Clock Timebase is a signal related to Convert Clock Timebase that is used to synchronize external signals before they are used by circuits running from Convert Clock Timebase Sample Clock Timebase and Sync Sample Clock Timebase Sample Clock Timebase is the source for the SI counter and can be used to generate the sample timing Each Sample Clock in turn triggers t...

Page 227: ... Sample Clock and Sample Clock Selected Sample Clock is the signal selected to become Sample Clock before any synchronization just after the selection mux The Sample Clock marks the beginning of a new sample This signal can be an external or internal signal When an internal signal it can be generated with the SI counter dividing the Sample Clock Timebase signal It also can come from an external te...

Page 228: ...maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Count...

Page 229: ...free running and highly irregular In this case Sync Convert Clock Timebase is selected to be the actual external signal and Convert Clock Timebase is a delayed version of the external signal This delay is long enough so that external signals can be synchronized with Sync Convert Clock Timebase and used by Convert Clock Timebase For timing diagrams and parameters for this case refer to the Convert ...

Page 230: ...Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Convert Clock Timebase Sync Convert Clock Timebase SI Start p_AI_Convert Start 1 _i SI2_TC Pause Trigger Pause Trigger _i Sync Convert Clock Timebase Sample Clock Timebase Sync Sample Clock Timebase Co...

Page 231: ...vert Clock Timebase If the SI2 counter is not being used external convert case the Convert Clock Timebase is assumed to be not free running and the relationship between the Convert Clock Timebase and the Sync Convert Clock Timebase is an asynchronous delay Whether the SI2 counter is used or not the timing parameters in the generation of Convert Clock are the same starting at the Convert Clock Time...

Page 232: ... 9 Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Convert Clock Timebase Sync Convert Clock Timebase SI Start p_AI_Convert Start 1 SI2_TC Pause ...

Page 233: ...t Clock Timebase timing domain has received a valid Start Trigger the AI timing engine is ready to begin generating converts as soon as it receives a Sample Clock beginning of a sample Once the Sample Clock Timebase domain has received a valid Start Trigger the AI timing engine is ready to begin generating Sample Clocks t9 Delay from _i to Convert Clock Timebase PFI 16 2 39 1 RTSI 16 0 38 8 STAR 1...

Page 234: ...e Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Convert Clock Timebase Sync Convert Clock Timebase SI Start SI2_TC p_AI_Convert Start 1 _i POUT Pause Trigger _i POUT Selected Start Trigger Sync Convert Clock Timebase Start Tri...

Page 235: ... Trigger Hold Time to Sync Convert Clock Timebase 0 t16 Sync Convert Clock Timebase to Start Trigger 0 9 2 4 t17 Start Trigger to POUT PFI 1 1 3 1 RTSI 1 1 2 7 Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counte...

Page 236: ...x ns t18 Delay to Selected Start Trigger PFI 3 4 8 8 RTSI 3 3 8 5 STAR 2 7 5 7 t19 Selected Start Trigger Setup Hold Time to Sync Sample Clock Timebase 1 5 t20 Selected Start Trigger Setup Hold Time to Sync Sample Clock Timebase 0 t21 Sync Sample Clock Timebase to SI_Start 0 9 2 2 _i Selected Start Trigger Sync Sample Clock Timebase SI Start t18 t21 t19 t20 ...

Page 237: ...r Its output is called the Selected Reference Trigger Figure B 13 Reference Trigger and the Analog Input Timing Engine Figure B 14 Reference Trigger Timing Diagram Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Co...

Page 238: ...the Selected Reference Trigger PFI 3 6 8 9 RTSI 3 4 8 4 STAR 2 9 5 6 t23 Selected Reference Trigger Setup to Sync Convert Clock Timebase 1 5 t24 Selected Reference Trigger Hold to Sync Convert Clock Timebase 0 t25 Sync Convert Clock Timebase to Reference Trigger 0 9 2 2 t26 Reference Trigger to POUT PFI 0 8 2 3 RTSI 0 8 1 9 ...

Page 239: ...r is called Selected Sample Clock Figure B 15 Sample Clock and the Analog Input Timing Engine Figure B 16 Sample Clock Timing Diagram SI2_TC Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI_TC Sample Clock Timebase S...

Page 240: ...s Max ns t27 Delay to Selected Sample Clock PFI 3 5 8 9 RTSI 3 4 8 6 STAR 2 8 5 9 t28 Selected Sample Clock Setup time to Sync Convert Clock Timebase 1 5 t29 Selected Sample Clock Hold time to Sync Convert Clock Timebase 0 t30 Sync Convert Clock Timebase to Sample Clock 2 4 5 8 t31 Sample Clock to POUT PFI 2 4 5 5 RTSI 3 2 6 8 Table B 9 AI_Sample_In_Progress Timing Time Description Line Min ns Max...

Page 241: ...ine Figure B 19 Pause Trigger Timing Diagram Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Convert Clock Timebase Sync Convert Clock Timebase S...

Page 242: ...B 21 and Table B 11 describe output timing The delays presented in this section assume a 200 pF load on PFI lines and a 50 pF load on RTSI lines Actual delays vary with the actual load Table B 10 Pause Trigger Timing Time Description Line Min ns Max ns t34 _i to Selected Gate PFI 3 2 7 8 RTSI 3 0 7 5 STAR 2 5 4 9 t35 Selected Pause Trigger Setup Time to Sync Convert Clock Timebase 1 5 t36 Hold Syn...

Page 243: ...I 6 0 13 9 Start Trigger Terminal Selected Reference Trigger Reference Trigger Terminal Terminal Selected Sample Clock Terminal Terminal Terminal Selected Start Trigger RTSI Terminal Terminal Terminal Selected Pause Trigger SI Counter Block SI2 Counter Block SI_TC Sample Clock Timebase Sync Sample Clock Timebase Convert Clock Timebase Sync Convert Clock Timebase SI Start p_AI_Convert Start 1 POUT ...

Page 244: ... routed to the DAC and in every pulse the DAC will perform a data conversion This signal can come directly from an external signal or can be the result of dividing down the Sample Clock Timebase using the UI counter Sample Clock Timebase This signal can be used to generate the Sample Clock This signal acts as the clock for the UI counter and a Sample Clock can be generated every N periods of the S...

Page 245: ...tion block for the Pause Trigger source Star_Trig RTSI or PFI These terminals are the I O interface for the device All external triggers are input on these terminals Internal signals can be exported to these terminals as well _i Signals All signals marked with _i are external signals that have been through the I O buffers and are ready for internal use Input Timing Input timing refers to the delay...

Page 246: ...n be an external signal When the analog output timing engine operates in this mode it is assumed that the source signal for the Sample Clock timebase is a free running clock so the Sync Sample Clock Timebase is the inverted version of Sample Clock Timebase Configuring the analog output timing engine for rising edge operation will cause the external signals to be synchronized on the falling edge of...

Page 247: ... the rising edge of Sync Sample Clock Timebase Table B 14 Sample Clock Timebase and the Sync Sample Clock Timebase Timing Time From To Min ns Max ns t4 Signal_i Sample Clock Timebase 2 4 9 3 t5 Signal_i Sync Sample Clock Timebase 2 4 9 3 Table B 15 Start Trigger Timing from Signal_i to Selected Start Trigger Time From To Min ns Max ns t6 Signal_i Selected Start Trigger 2 9 9 8 Table B 16 Start Tri...

Page 248: ...elay be the delay from the trigger terminal to the DFF Let ClockDelay be the delay from the clock terminal to the DFF Let DFFSetup and DFFHold be the setup and hold time of the DFF Let ExternalSetup and ExternalHold be the setup and hold time of the trigger to the clock at the terminals Table B 17 Pause Trigger Timing from Signal_i to Selected Pause Trigger Time From To Min ns Max ns t9 Signal_i S...

Page 249: ...maximum delay and two numbers for the minimum delay In order to account for the worst case skew between different input terminals use the range given in the input delay tables in the Input Timing section in a way that provides the most conservative results For setup calculations use the bigger number for TriggerDelay and the smaller number ClockDelay For hold calculations use the smaller number fo...

Page 250: ...by adding the delay in Table B 20 to the total Selected Pause delay Figure B 33 Pause Trigger Path Table B 19 Start Trigger Output Delay Timing Time From To Min ns Max ns t12 Selected Start Trigger PFI 8 1 9 1 27 1 30 8 Selected Start Trigger RTSI 7 5 7 7 17 9 18 5 Selected Start Trigger Sync Sample Clock Timebase D Q To Internal Logic Routing Logic RTSI PFI Selected Start Trigger PFI RTSI Termina...

Page 251: ...lling edge representing a conversion Figure B 35 Sample Clock Path Figure B 36 Sample Clock Delay Timing Diagram Table B 20 Pause Trigger Output Routing Delay Timing Time From To Min ns Max ns t13 Selected Pause Trigger RTSI 6 7 7 1 16 3 17 0 Table B 21 Sample Clock Delay Timing Time From To Min ns Max ns t14 AO Sample Clock PFI 9 7 10 7 31 1 34 3 AO Sample Clock RTSI 8 8 9 1 21 3 21 7 Selected Pa...

Page 252: ...ins of the M Series device The other named signals represent internal signals Figure B 37 Digital Waveform Acquisition Timing Circuitry Figure B 38 and Tables B 22 and B 23 describe the digital waveform acquisition timing delays and requirements Your inputs must meet the requirements to ensure proper behavior Figure B 38 Digital Waveform Acquisition Timing Delays DO Waveform Generation FIFO PFI Ou...

Page 253: ... given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important When DI Sample Clock is routed to a PFI output pin the pulse width of the output is independent of the pulse width of the input The pulse width is specified in a number of periods of the 80 MHz Timebase Table B 23 DI Timin...

Page 254: ...e digital waveform generation timing delays and requirements Your inputs must meet the requirements to ensure proper behavior Figure B 40 Digital Waveform Acquisition Timing Delays Table B 24 DO Timing Delays Time From To Min ns Max ns t12 PFI PFI_i 5 2 6 2 18 2 22 0 RTSI RTSI_i 2 0 2 5 5 0 6 0 PXI_STAR PXI_STAR_i 1 5 3 5 t13 PFI_i RTSI_i PXI_STAR_i or other internal signal DO Sample Clock 3 5 9 5...

Page 255: ...periods of 80 MHz Timebase The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important When DO Sample Clock is routed to a PFI output pin the pulse width of the ...

Page 256: ...ns Max ns t1 PFI PFI_i 5 2 6 2 18 2 22 0 RTSI RTSI_i 2 0 2 5 5 0 6 0 STAR STAR_i 0 9 2 5 The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important 32 Bit Count...

Page 257: ...enced to these two signals Any internal signal refers to signals with _i from the previous table or signals coming from another subsystem inside the M Series device It does not include internal timebases or the PXI_CLK10 Figure B 43 Selected Gate Delays Timing Diagram Figure B 44 Selected Source Delays Timing Diagram Table B 27 Selected Gate Delays Timing Time From To Min ns Max ns t2 PFI_i RTSI_i...

Page 258: ... delays depend on both the synchronization mode and gating mode for the application Figure B 45 Count Enable Delays Table B 28 Selected Source Delays Timing Time From To Min ns Max ns t3 PFI_i RTSI_i PXI_STAR_i or any internal signal Selected Source 8 0 21 0 20 MHz Timebase Selected Source 1 5 4 0 100 kHz Timebase Selected Source 1 5 4 0 80 MHz Timebase Selected Source 1 0 2 5 PXI_CLK10 Selected S...

Page 259: ...quirements Table B 29 Selected Gate to Count Enable Delays Time Synchronization Mode Gating Mode Min ns Max ns t4 80 MHz Source Edge 0 5 5 0 Level 1 0 0 5 Other Internal Source Edge 1 2 Source Period 1 ns 1 2 SourcePeriod 3 ns Level 1 2 Source Period 2 5 ns 1 2 Source Period 1 ns External Source Edge 7 5 22 0 Level 6 0 18 0 Table B 30 Counter n Source Timing Time Description Synchronization Mode M...

Page 260: ...e t6 Counter n Source Pulse Width 80 MHz Source 6 2 Other Internal Source 12 5 External Source 16 0 The times in this table are measured at the pin of the M Series device For example t5 specifies the minimum period of a signal driving a PFI RTSI or PXI_STAR pin when that signal is internally routed to Counter n Source Table B 31 Counter n Gate Pulse Width Timing Time Description Gating Mode Min ns...

Page 261: ...can determine whether the setup and hold requirements are met by adding up the various delays of the appropriate signals through the counter timer circuit Figure B 49 DAQ STC2 Internal Block Setup and Hold Requirements Timing Diagram Table B 32 Gate to Source Setup and Hold Timing Time Description Gating Mode Synchronizat ion Mode Min ns Max ns t8S Setup time from PFI Gate to PFI Source Edge Exter...

Page 262: ...old time subtract the Gate delay from the Source delay Use minimum delays Output Delays Refer to the Figure B 41 for the M Series counter timer circuitry Gate Delay PFI to PFI_i 22 0 ns PFI_i to Selected Gate 6 0 ns Selected Gate to Count Enable Level 18 0 ns Count Enable Setup Time 1 5 ns 47 5 ns Source Delay PFI to PFI_i 18 2 ns PFI_i to Selected Source 21 0 ns 39 2 ns TSetup 47 5 ns 39 2 ns 8 3...

Page 263: ...e or edge gating mode In NI DAQmx the counter timers use level gating mode for the following measurements Edge counting Pulse width measurements Two signal edge separation measurements All other measurements use edge gating mode Table B 34 Output Delays Timing Time Line Min ns Max ns t10 1 0 4 0 t11 PFI 7 5 28 2 RTSI 6 5 18 0 t12 PFI 8 5 32 2 RTSI 7 5 22 0 t13 PFI 7 5 28 7 RTSI 6 5 18 0 t10 t11 t1...

Page 264: ...ams Table B 35 Quadrature and Two Pulse Encoder Timing Time Description Min ns Max ns t14 Counter n A Period 50 0 t15 Counter n A Pulse Width 25 0 t16 Counter n B Period 50 0 t17 Counter n B Pulse Width 25 0 t18 Counter n Z Pulse Width 25 0 t19 Delay from Counter n A to Counter n B 25 0 t20 Delay from Counter n B to Counter n A 25 0 The times in this table are measured at the pin of the M Series d...

Page 265: ...m the onboard 80 MHz oscillator Figure B 52 Generating Different Clocks from the Onboard 80 MHz Oscillator Table B 36 Generating Different Clocks from the Onboard 80 MHz Oscillator Time From To Min ns Max ns t1 Onboard 80 MHz Oscillator 80 MHz Timebase 4 0 9 0 t2 80 MHz Timebase 20 MHz Timebase 0 5 2 5 t3 80 MHz Timebase 100 kHz Timebase 1 0 5 0 Onboard 80 MHz Oscillator 80 MHz Timebase 20 MHz Tim...

Page 266: ...ernal Reference Clock and the PLL Table B 37 Generating Different Clocks Using an External Reference Clock and the PLL Time From To Min ns Max ns t4 80 MHz Timebase 20 MHz Timebase 1 5 5 0 t5 The source of the external reference clock RTSI 0 7 STAR_TRIG PX I_CLK10 80 MHz Timebase through PLL_OUT 1 0 5 5 RTSI 0 7 STAR_TRIG PXI_CLK10 Reference Clock 80 MHz Timebase PLL 20 MHz Timebase PLL t4 t5 ...

Page 267: ...is due to sampling among multiple channels at various gains In this situation the settling times can increase For more information about charge injection and sampling channels at different gains refer to the Multichannel Scanning Considerations section of Chapter 4 Analog Input I am using my device in differential analog input ground reference mode and I have connected a differential input signal ...

Page 268: ...ows multiple channels to be sampled relatively quickly in relationship to the overall sample rate providing a nearly simultaneous effect with a fixed delay between channels Analog Output I am seeing glitches on the output signal How can I minimize it When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltag...

Page 269: ...r signals to my M Series device The Default Counter Timer Pinouts section of Chapter 7 Counters has information about counter signal connections M Series Installation Issues My M Series device is not detected by Measurement Automation Explorer MAX or the Windows 2000 NT XP operating system When using other devices such as E Series devices on the same PC they work fine What is the problem Appendix ...

Page 270: ...tween M Series and E Series multifunction I O families M Series and E Series Pinout Comparison The pinout of Connector 0 of 68 pin M Series devices is similar to the pinout of 68 pin E Series devices On M Series devices some terminals have enhanced functionality or other slight differences Table D 1 compares the two pinouts ...

Page 271: ... OUT GPCTR1_OUT PFI 13 P2 5 EXT STROBE PFI 10 P2 2 AI HOLD COMP SCANCLK PFI 11 P2 3 PFI 9 CTR 0 GATE GPCTR0_GATE PFI 9 P2 1 As a PFI input the functionality of E Series and M Series devices is similar for these terminals E Series devices can drive each of these terminals with one particular internal timing signal M Series devices can drive each terminal with the same signal as on E Series devices ...

Page 272: ...On M Series devices you have to use one of the PFI terminals to control the up down signal of general purpose Counters 0 and 1 P0 7 P0 7 AO EXT REF EXTREF APFI 0 On E Series devices this terminal is the external reference input for the AO circuitry On M Series devices this terminal can be used as the external reference input for the AO circuitry the external offset for the AO circuitry or the anal...

Page 273: ...ghts the main differences to remember when moving an application from E Series to M Series devices To access this document go to ni com info and enter the Info Code rde2m1 Using E Series Accessories with M Series Devices KnowledgeBase describes how to use 68 pin E Series accessories with M Series devices To access this KnowledgeBase go to ni com info and enter the Info Code rdea2m M Series or S Se...

Page 274: ... and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQmx 15 5 or later M Series Documentation DAQ Getting Started Guide for PXI PXI Express DAQ Getting Started Guide for PCI PCI Express or DAQ Getting Started Guide for Externally Powered USB packaged with your device or mod...

Page 275: ...622x 625x 628x devices are not supported in NI DAQmx for Linux NI DAQmx Base Linux Mac OS X The NI DAQmx Base Getting Started Guide describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly Getting Started with NI DAQmx Base for Linux and Mac Users describes how to install your NI DAQmx Base software your ...

Page 276: ...tion about getting started with LabVIEW Real Time The Real Time Module Concepts book of the LabVIEW Real Time Module Help includes conceptual information about real time programming techniques application architectures and Real Time Module features you can use to create real time applications Refer to the Real Time Module concepts before attempting to create a deterministic real time application L...

Page 277: ... to Getting Started with the Measurement Studio Class Libraries To create an NI DAQmx application using Visual Basic NET or Visual C follow these general steps 1 In Visual Studio select File New Project to launch the New Project dialog box 2 Choose a programming language Visual C or Visual Basic NET and then select Measurement Studio to see a list of project templates 3 Select NI DAQ Windows Appli...

Page 278: ...Web For additional support refer to ni com support or ni com examples Note You can download these documents at ni com manuals Many DAQ specifications and user guides manuals are available as PDFs You must have Adobe Reader 7 0 or later PDF 1 6 or later installed to view the PDFs Refer to the Adobe Systems Incorporated website at www adobe com to download Adobe Reader Refer to the National Instrume...

Page 279: ...ify your systems accuracy and reliability requirements and provides warranty sparing and calibration services to help you maintain accuracy and minimize downtime over the life of your system Visit ni com services for more information Warranty and Repair All NI hardware features a one year standard warranty that is extendable up to five years NI offers repair services performed in a timely manner b...

Page 280: ...ations Engineers make sure every question submitted online receives an answer Software Support Service Membership The Standard Service Program SSP is a renewable one year subscription included with almost every NI software product including NI Developer Suite This program entitles members to direct access to NI Applications Engineers through phone and email for one to one technical support as well...

Page 281: ...erminal A 24 USB 6251 BNC A 34 USB 6251 Mass Termination A 36 USB 6255 Mass Termination A 20 A 44 USB 6259 BNC A 50 USB 6259 Mass Termination A 52 USB 6281 Mass Termination A 60 USB 6289 Mass Termination A 68 used with M Series D 4 accuracy analog triggers 11 6 acquisitions circular buffered 4 9 digital waveform 6 3 double buffered 4 9 hardware timed 4 9 on demand 4 9 software timed 4 9 AI channel...

Page 282: ...oting C 1 analog output 5 1 circuitry 5 1 connecting signals 5 5 data generation methods 5 3 fundamentals 5 1 getting started with applications in software 5 10 glitches on the output signal 5 3 offset 5 2 reference selection 5 2 signals 5 6 AO Pause Trigger 5 7 AO Sample Clock 5 8 AO Sample Clock Timebase 5 9 AO Start Trigger 5 6 timing diagrams B 20 timing signals 5 6 trigger signals 5 5 trigger...

Page 283: ...6281 Mass Termination A 60 USB 6289 Mass Termination A 68 calibration 1 4 cascading counters 7 30 Change Detection Event signal 6 7 changing data transfer methods between DMA and IRQ 10 2 10 3 between USB signal stream and programmed I O 10 3 channel scanning order 4 7 Z behavior 7 16 channels analog input 11 2 sampling with AI Sample Clock and AI Convert Clock C 2 charge injection C 1 choosing fr...

Page 284: ... 4 21 for multichannel scanning 4 6 for PXI 10 3 continuous pulse train generation 7 21 controller DMA 10 2 controlling counting direction 7 2 count enable delay B 34 counter input and output 7 28 output applications 7 19 terminals default 7 28 Counter n A signal 7 27 Counter n Aux signal 7 26 Counter n B signal 7 27 Counter n Gate signal 7 25 Counter n HW Arm signal 7 27 Counter n Internal Output...

Page 285: ...1 13 self calibration 1 4 specifications A 1 DI change detection 6 7 DI Sample Clock signal 6 3 di SampleClock 6 3 DIFF connections using with floating signal sources 4 13 using with ground referenced signal sources 4 19 when to use with floating signal sources 4 12 when to use with ground referenced signal sources 4 18 differential analog input troubleshooting C 1 differential connections using w...

Page 286: ...nal 7 18 single two signal 7 18 enabling duplicate count prevention in NI DAQmx 7 35 encoders quadrature 7 15 encoding X1 7 15 X2 7 15 X4 7 15 equivalent time sampling 7 23 example programs E 1 exporting timing output signals using PFI terminals 8 2 external reference clock 9 2 external source mode 7 36 F features counter 7 30 field wiring considerations 4 21 filters counter 7 30 PFI 8 4 PXI_STAR ...

Page 287: ...nput 4 4 ground referenced signal sources connecting 4 17 description 4 17 using in differential mode 4 19 using in NRSE mode 4 20 when to use in differential mode 4 18 when to use in NRSE mode 4 18 when to use in RSE mode 4 19 H hardware 2 1 hardware installation 1 3 hardware timed acquisitions 4 9 generations 5 4 hysteresis analog edge triggering with 11 4 I I O connector 3 1 PCI PCIe PXI PXIe 6...

Page 288: ...ation A 20 USB 6225 Screw Terminal A 18 USB 6229 BNC A 26 USB 6229 Screw Terminal A 24 USB 6251 BNC A 34 USB 6251 Mass Termination A 36 USB 6251 Screw Terminal A 32 USB 6255 Mass Termination A 44 USB 6255 Screw Terminal A 42 USB 6259 BNC A 50 USB 6259 Mass Termination A 52 USB 6259 Screw Terminal A 48 USB 6281 Mass Termination A 60 USB 6281 Screw Terminal A 58 USB 6289 Mass Termination A 68 USB 62...

Page 289: ...7 accessory options A 38 cabling options A 38 pinout A 37 specifications A 38 NI 6255 A 39 specifications A 40 A 44 NI 6259 A 45 specifications A 52 NI 6280 A 53 accessory options A 54 cabling options A 54 pinout A 53 specifications A 54 NI 6281 A 55 specifications A 56 NI 6284 A 61 accessory options A 62 cabling options A 62 pinout A 61 specifications A 62 NI 6289 A 63 specifications A 64 A 68 NI...

Page 290: ... 45 specifications A 46 PCI PXI 6221 68 pin accessory options A 6 A 12 cabling options A 6 A 12 pinout A 4 specifications A 6 PCI PXI 6225 accessory options A 16 cabling options A 16 pinout A 15 specifications A 16 PCI PXI 6229 accessory options A 22 cabling options A 22 pinout A 21 specifications A 22 PCI PXI 6255 accessory options A 40 cabling options A 40 pinout A 39 PCI PXI 6281 accessory opti...

Page 291: ...SB 6251 BNC A 33 USB 6251 Mass Termination A 35 USB 6251 Screw Terminal A 31 USB 6255 Mass Termination A 43 USB 6255 Screw Terminal A 41 USB 6259 BNC A 49 USB 6259 Mass Termination A 51 USB 6259 Screw Terminal A 47 USB 6281 Mass Termination A 59 USB 6281 Screw Terminal A 57 USB 6289 Mass Termination A 67 USB 6289 Screw Terminal A 65 pins default 7 28 position measurement 7 14 buffered 7 17 power 5...

Page 292: ...al 11 3 clock 9 1 digital 9 1 RSE configuration 4 17 RSE connections using with floating signal sources 4 17 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 19 RTSI 9 4 connector pinout 3 7 9 4 filters 9 6 using as outputs 9 5 using terminals as timing input signals 9 6 S safety guidelines for hazardous voltages 1 2 sample clock analog input intern...

Page 293: ... glitches on 5 3 simple pulse generation 7 19 single period measurement 7 5 point edge counting 7 2 pulse generation 7 19 retriggerable 7 20 with start trigger 7 20 pulse width measurement 7 4 semi period measurement 7 7 two signal edge separation measurement 7 18 single ended connections for floating signal sources 4 17 RSE configuration 4 17 software 1 3 configuring AI ground reference settings ...

Page 294: ...ns B 2 analog input Start B 9 analog input timing B 3 analog output B 20 analog output input timing B 21 analog output Pause Trigger B 26 analog output pause trigger B 23 analog output signal definitions B 20 analog output Start trigger B 23 analog output timing Start trigger B 25 clock generation B 41 Convert Clock B 7 count enable delays B 34 counter gating modes B 39 counter input requirements ...

Page 295: ... relief 1 8 USB 6221 Mass Termination USB cable strain relief 1 8 USB 6221 Screw Terminal accessory options A 8 A 10 A 18 A 24 A 26 A 34 A 50 cabling options A 8 A 10 A 18 A 24 A 26 A 34 A 50 fuse replacement A 8 A 10 LED patterns A 8 A 10 A 14 A 16 pinout A 7 signal label 1 6 specifications A 8 A 10 A 12 A 14 A 16 USB cable strain relief 1 8 1 12 USB 6225 Mass Termination A 15 accessory options A...

Page 296: ... A 50 pinout A 49 specifications A 50 USB cable strain relief 1 8 USB 6259 Mass Termination accessory options A 52 cabling options A 52 fuse replacement A 52 LED patterns A 52 pinout A 51 specifications A 52 USB cable strain relief 1 8 1 12 USB 6259 Screw Terminal fuse replacement A 48 LED patterns A 48 pinout A 47 signal label 1 6 specifications A 48 USB cable strain relief 1 8 1 12 USB 6281 Mass...

Page 297: ...8 3 as timing input signals 8 2 to export timing output signals 8 2 RTSI as outputs 9 5 terminals as timing input signals 9 6 short high quality cabling 4 7 the disk drive power connector PCI Express 1 5 W waveform generation digital 6 4 signals 5 6 triggering 6 2 X X1 encoding 7 15 X2 encoding 7 15 X4 encoding 7 15 ...

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