Rear Signal Connector
Appendix B
SCXI-1162 User Manual
B-2
© National Instruments Corporation
Rear Signal Connector Signal Descriptions
Pin
Signal Description
24 or 50
DIG GND
Digital Ground – Supplies the reference for data
acquisition board digital signals and is tied to the
module digital ground. Pin 50 is for DIO boards.
Pin 24 is for MIO boards and jumper W4 selects it.
25
SERDATIN
Serial Data In – Taps into the SCXIbus MOSI line
to provide serial input data to a module or Slot 0.
26 or 47
SERDATOUT
Serial Data Out – Taps into the SCXIbus MISO line
to accept serial output data from a module. Pin 47
is for DIO boards. Pin 26 is for MIO boards and
jumper W6 selects it.
27
DAQD*/A
Data Acquisition Board Data/Address Line – Taps
into the SCXIbus D*/A line to indicate to the
module whether the incoming serial stream is data
or address information.
29
SLOT0SEL*
Slot 0 Select – Taps into the SCXIbus INTR* line
to indicate whether the information on MOSI is
sent to a module or to Slot 0.
31 or 37
SERCLK
Serial Clock – Taps into the SCXIbus
SPICLK line to clock the data on the MOSI and
MISO lines. Pin 31 is for DIO boards. Pin 37 is for
MIO boards and jumper W3 selects it.
All other pins are not connected.
With the rear connector configured for parallel communication, the signals are as follows:
Pin
Signal
Description
1, 3, 5, 7, 9, 11,
Out <23..0>
Parallel outputs driven to the logic levels seen at
13, 15, 17, 19, 21,
inputs 23 through 0.
23, 25, 27, 29, 31,
33, 35, 37, 39,41,
43, 45, 47
34, 36, 38, 40,
Out <31..24>
Parallel outputs driven to the logic levels seen at
42, 44, 46, 48
inputs 31 through 24 when jumper W1 is set to 32.
50
GND
Ground – Supplies ground reference for the parallel
outputs.
See the Timing Requirements and Communication Protocol section in Chapter 2, Configuration
and Installation, for more detailed information on timing.
