NAD C715, Service Manual

Page: 31 / 68

2
- 20
Pin
No.
Pin name I/O Description Remark
36 BUS0
I/O
3I/F
37 BUS1
I/O
3I/F
38 BUS2
I/O
3I/F
39 BUS3
I/O
3I/F
Data input/output pin for the microcontroller
interface.
To be fixed at "H" or "L"
when communication is
not in progress, so that the
pin will not become HiZ.
40 BUCK
I
3I/F
Clock input pin for the microcontroller
interface.
41 /CCE
I
3I/F
Chip enable signal input pin for the
microcontroller interface. BUS3 to BUS0
are active if this pin is "L".
To be fixed at "H" when
communication is not in
progress, so that the pin
will not become HiZ.
42 /RST
I
3I/F
Reset signal input pin. The internal
registers and servo section registers are
reset, respectively, when the reset signal is
"L" and on the positive-going edge of the
reset signal.
To be connected to 0.1
uF.
43 STBY
I
3I/F
STANBY control pin dedicated to the
DSP/1Mbit SRAMcircuit.
—
44 VDDT —
3.3 V supply voltage pin dedicated to the
Digital I/O circuit.
—
45 FGIN
I
3AI/F
FG signal input pin for CAV.
CLV: "L". CAV: FG input.
—
46 IO0A
㧔 /HSO 㧕
I/O
3I/F
47
IO1A
㧔
/UHSO
㧕
I/O
3I/F
General-purpose input/output pins.
(Pin for outputting the playback speed
mode flag.)
/UHSO /HSO Playback speed
H H Normal speed
H L 2 times
L H 4 times
General-purpose I/O (input
after a reset).
The playback speed mode
flag output can be
switched, using command
bits.
48 TESTD
I
3I/F
DSP/Test input pin. Usually fixed at "L". —
48 VSSP —
1.5 V grounding pin dedicated to the
DSP/VCO circuit.
—
50 VCOI
O
1.5AI/F
PD output pin dedicated to the
DSP/VCOcircuit.
—
51 VDDP —
1.5 V supply voltage pin dedicated to the
DSP/VCO circuit.
—
52 TESTC
I
3I/F
CD/ Test input pin. Usually fixed at "L".
—
53 PIO0
I/O
3I/F
General-purpose I/O
㧔
CD/DSP
㧕
54 PIO1
I/O
3I/F
General-purpose I/O 㧔 CD/DSP 㧕
55 PIO2
I/O
3I/F
General-purpose I/O
㧔
DSP
㧕
56 PIO3
I/O
3I/F
General-purpose I/O 㧔 DSP 㧕
General-purpose I/O (input
after a reset).