CHAPTER 3 HARDWARE AND SPECIFICATIONS
16
MultiConnect
®
Dragonfly
TM
MTQ-LVW3 Device Guide
MTQ Pin SPI
Interface
I2C Interface USARTs
Timer
Functions
SDIO
Functions
Event Trigger
Output
ADC
Channels
27
TIM3_CH3
SDIO_D0
EVENTOUT
29
USART2_CTS
TIM2_CH1/
TIM2_ET,
TIM5_CH1,
EVENTOUT
ADC1_0
30
I2C3_SMBA
USART1_TX
TIM1_CH2
SDIO_D2
EVENTOUT
31
I2C3_SCL
MCO_1,
TIM1_CH1
SDIO_D1
EVENTOUT
32
USART2_RX
TIM2_CH4,
TIM5_CH4,
TIM9_CH2
EVENTOUT
ADC1_3
38
SPI1_SCK
USART1_RX
TIM2_CH2
EVENTOUT
39
EVENTOUT
40
I2C1_SDA
USART1_RX
TIM4_CH2
SDIO_D0
EVENTOUT
Processor Pin Information (B01 models only)
Note:
Diagram from the STMicro 32F411 datasheet.
The following table lists the processor pins and how the MTQ uses them.
Net Name
Number
Pin Name
Details
VDD3_3
1
VBAT
Power
3G_ONOFF
2
PC13
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