.7.&&4JOHMF#PBSE$PNQVUFS*OTUBMMBUJPOBOE6TF ""#
$IBQUFS )BSEXBSF1SFQBSBUJPOBOE*OTUBMMBUJPO
'MBTI#MPDL8SJUF1SPUFDU4XJUDI 4
5IJTTXJUDITVQQPSUTUIF*OUFM+'MBTIGBNJMZXSJUFQSPUFDUGFBUVSF4FUUP0''JUFOBCMFTUIF
MPDLEPXONFDIBOJTN#MPDLTMPDLFEEPXODBOOPUCFVOMPDLFEXJUIUIFVOMPDLDPNNBOE5IF
TXJUDINVTUCFTFUUP0/JOPSEFSUPPWFSSJEFUIFMPDLEPXOGVODUJPOBOEFOBCMFCMPDLTUPCF
FSBTFEPSQSPHSBNNFEUISPVHITPGUXBSF3FGFSUPUIF*OUFM+'MBTIEBUBTIFFUMJTUFEJO
GPSGVSUIFSEFUBJMT
430.*OJUJBMJ[BUJPO&OBCMF4XJUDI 4
5IJTTXJUDIFOBCMFTEJTBCMFTUIF(5#430.JOJUJBMJ[BUJPO8IFOTFUUPJUFOBCMFTUIF
(5#EFWJDFJOJUJBMJ[BUJPOWJB*$430.4FUUP0/EJTBCMFTUIJTJOJUJBMJ[BUJPOTFRVFODF
1$*#VT4QFFE4XJUDI 4
5IJTTXJUDIDBOGPSDF1$*CVTUPSVOBU.)[SBUIFSUIBOUIFTUBOEBSENFUIPEPGBMMPXJOH
UIF1.$CPBSEUPDPOUSPMXIFUIFSUIFCVTSVOTBU.)[PS.)[4FUUPJUBMMPXTUIF
1.$CPBSEUPDIPPTFUIF1$*CVTTQFFE4FUUP0/GPSDFT1$*CVTUPSVOBU.)[
Disable Flash 0 J3
(factory configuration)
block writes
Enable Flash 0 J3
block writes
S3-2
1
ON
2
3
4
1
ON
2
3
4
Enable SROM initialization
Disable SROM initialization
(factory configuration)
1
ON
1
ON
2
2
S5-2
PMC board controls
(factory configuration)
Force PCI bus 0.0
PCI 0.0 bus speed
to run at 33 MHz
1
ON
1
ON
2
2
S4-1
Summary of Contents for MVME55006E
Page 1: ... 7 4FSJFT 7 4JOHMF PBSE PNQVUFS OTUBMMBUJPO BOE 6TF BOVBSZ EJUJPO ...
Page 12: ... 7 4JOHMF PBSE PNQVUFS OTUBMMBUJPO BOE 6TF JTU PG JHVSFT YJJ ...
Page 14: ... 7 4JOHMF PBSE PNQVUFS OTUBMMBUJPO BOE 6TF JTU PG 5BCMFT YJW ...
Page 18: ......
Page 38: ......
Page 62: ......