Motorola MVME162P-242, Installation And Use Manual

Page: 86 / 134

4-4 Computer Group Literature Center Web Site
Functional Description
4
ASICs
The following ASICs are used on the MVME162P2:
❏
VMEchip2 ASIC (VMEbus interface). Provides two tick timers, a
watchdog timer, programmable map decoders for the master and
slave interfaces, and a VMEbus-to/from-local-bus DMA controller
as well as a VMEbus-to/from-local-bus non-DMA programmed
access interface, a VMEbus interrupter, a VMEbus system
controller, a VMEbus interrupt handler, and a VMEbus requester.
Processor-to-VMEbus transfers are D8, D16, or D32. VMEchip2
DMA transfers to the VMEbus, however, are D16, D32, D16/BLT,
D32/BLT, or D64/MBLT.
❏
Petra ASIC. Combines the functions previously covered by the
MC2 chip, the MCECC chip, and the IP2 chip in a single ASIC.
– MC2 function. Provides a parity DRAM emulation. Also
supplies four tick timers and interfaces to the LAN chip, SCSI
chip, serial port chip, BBRAM, EPROM/Flash, and SRAM.
– MCECC function. Provides an ECC DRAM emulation.
– IP2 function. Provides control and status information for up to
two single-wide or one double-wide IndustryPack module,
which can be plugged into the MVME162P2 main board.
Block Diagram
The block diagram in Figure 4-1 on page 4-5 illustrates the
MVME162P2’s overall architecture.