
37-14
MPC860 PowerQUICC UserÕs Manual
MOTOROLA
Part VI. Debug and Test
The four load/store data events, combined with the match events of the load/store address
comparators and the instruction watchpoints, are used to generate the load/store
watchpoints and breakpoint according to the userÕs programming.
When programming load/store watchpoints to ignore L-addr events and L-data events, the
instruction must be a load/store instruction for the load/store watchpoint event to trigger.
37.2.3.3 The Counters
Each of the two 16-bit down counters can count an instruction watchpoint or a load/store
watchpoint. Both generate the corresponding breakpoint when they reach zero. In masked
mode, counters do not count detected watchpoints when MSR[RI] = 0. See
Section 37.2.4.3, ÒContext Dependent Filter.Ó Counter values are not predictable if they
count watchpoints programmed on instructions that alter counters directly. Readings from
the counters when active must be synchronized by inserting a sync instruction before the
read.
Note that when programmed to count instruction watchpoints, the last instruction that
decrements the counter to zero is treated like any other instruction breakpoint in that it is
not executed before the machine branches to the breakpoint exception routine. As a side
effect of this behavior, the value of the counter inside the breakpoint exception routine
equals one and not zero, as one might expect. When programmed to count load/store
watchpoints, the last instruction that decrements the counter to zero is treated like any other
1
& denotes a logical AND. | denotes a logical OR.
Table 37-7. Load/Store Data Events
Event Name
Event Function (see note)
G
(Gmatch0 | Gmatch1 | Gmatch2 | Gmatch3)
H
(Hmatch0 | Hmatch1 | Hmatch2 | Hmatch3)
(G & H)
1
((Gmatch0 & Hmatch0) | (Gmatch1 & Hmatch1) | (Gmatch2 & Hmatch2) | (Gmatch3 & Hmatch3))
((Gmatch0 | Hmatch0) | (Gmatch1 | Hmatch1) | (Gmatch2 | Hmatch2) | (Gmatch3 | Hmatch3))
Table 37-8. Load/Store Watchpoints Programming Options
Name
Description
Instruction Events
Programming Options
L-Address Events
Programming Options
L-Data Events
Programming Options
LW0
First load/store
watchpoint
IW0, IW1, IW2, IW3,
ignore instruction
events
Comparator E
Comparator F
Comparators (E & F)
Comparators (E | F)
Ignore L-address events
Comparator G
Comparator H
Comparators (G & H)
Comparators (G | H)
Ignore L-data events
LW1
Second
load/store
watchpoint
IW0, IW1, IW2, IW3,
ignore instruction
events
Comparator E
Comparator F
Comparators (E & F)
Comparators (E | F)
Ignore I-address events
Comparator G
Comparator H
Comparators (G & H)
Comparators (G | H)
Ignore L-data events
Summary of Contents for MPC860 PowerQUICC
Page 3: ...MPC860UM AD 07 98 REV 1 MPC860 PowerQUICC ª UserÕs Manual ...
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Page 78: ...I iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
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Page 226: ...8 32 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
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Page 274: ...III iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part III Configuration ...
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Page 325: ...MOTOROLA Part IV Hardware Interface IV v Part IV Hardware Interface ...
Page 326: ...IV vi MPC860 PowerQUICC UserÕs Manual MOTOROLA Part IV Hardware Interface ...
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Page 632: ...21 44 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part V The Communications Processor Module ...
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Page 998: ...37 48 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part VI Debug and Test ...
Page 1016: ...A 10 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
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