30-30
MPC860 PowerQUICC UserÕs Manual
MOTOROLA
Part V. The Communications Processor Module
30.4.12 SMC Transparent NMSI Programming Example
The following example initializes the SMC1 transparent channel over its own set of pins.
The CLK3 pin supplies the transmit and receive clocks; the SMSYN
x
pin is used for
synchronization. The SMC UART example shows baud-rate generator conÞguration.
1. ConÞgure the port B pins to enable SMTXD1, SMRXD1, and SMSYN1. Set
PBPAR[23Ð 25] and clear PBDIR[23Ð 25] and PBODR[23Ð 25].
2. ConÞgure the port A pins to enable CLK3. Set PAPAR[5] and clear PADIR[5]. The
other pin functions are the timers or the TSA. These alternate functions cannot be
used on this pin.
3. Connect CLK3 to SMC1 using the SI. Clear SIMODE[SMC1] and set
SIMODE[SMC1CS] to 0b110.
4. Write RBASE and TBASE in the SMC parameter RAM to point to the RxBD and
TxBD in the dual-port RAM. Assuming one RxBD at the beginning of the dual-port
RAM followed by one TxBD, write RBASE with 0x0000 and TBASE with 0x0008.
5. Program the CPCR to execute the
INIT
RX
AND
TX
PARAMETERS
command. Write
0x0091 to the CPCR.
6. Write 0x0001 to the SDCR to initialize the SDCR.
7. Write RFCR and TFCR with 0x10 for normal operation.
8. Write MRBLR with the maximum bytes per receive buffer. Assuming 16 bytes,
MRBLR = 0x0010.
9. Initialize the RxBD assuming the buffer is at 0x0000_1000 in main memory. Write
0xB000 to RxBD[Status and Control], 0x0000 to RxBD[Data Length] (optional),
and 0x0000_1000 to RxBD[Buffer Pointer].
10. Initialize the TxBD assuming the Tx buffer is at 0x0000_2000 in main memory and
contains Þve 8-bit characters. Write 0xB000 to TxBD[Status and Control], 0x0005
to TxBD[Data Length], and 0x0000_2000 to TxBD[Buffer Pointer].
11. Write 0xFF to SMCE to clear any previous events.
12. Write 0x13 to SMCM to enable all possible SMC interrupts.
13. Write 0x0000_0010 to the CIMR to allow SMC1 to generate a system interrupt. The
CICR should also be initialized.
14. Write 0x3830 to the SMCMR to conÞgure 8-bit characters, unreversed data, and
normal operation (not loopback). The transmitter and receiver are not enabled yet.
15. Write 0x3833 to the SMCMR to enable the SMC transmitter and receiver. This
additional write ensures that TEN and REN are enabled last.
After 5 bytes are sent, the TxBD is closed; after 16 bytes are received the receive butter is
closed. Any data received after 16 bytes causes a busy (out-of-buffers) condition since only
one RxBD is prepared.
Summary of Contents for MPC860 PowerQUICC
Page 3: ...MPC860UM AD 07 98 REV 1 MPC860 PowerQUICC ª UserÕs Manual ...
Page 36: ...xxxvi MPC860 PowerQUICC UserÕs Manual MOTOROLA CONTENTS Paragraph Number Title Page Number ...
Page 78: ...I iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
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Page 226: ...8 32 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
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Page 274: ...III iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part III Configuration ...
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Page 325: ...MOTOROLA Part IV Hardware Interface IV v Part IV Hardware Interface ...
Page 326: ...IV vi MPC860 PowerQUICC UserÕs Manual MOTOROLA Part IV Hardware Interface ...
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Page 998: ...37 48 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part VI Debug and Test ...
Page 1016: ...A 10 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
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