30-20
MPC860 PowerQUICC UserÕs Manual
MOTOROLA
Part V. The Communications Processor Module
11. Set BRKCR to 0x0001; if a
STOP
TRANSMIT
COMMAND
is issued, one break
character is sent.
12. Initialize the RxBD. Assume the Rx buffer is at 0x0000_1000 in main memory.
Write 0xB000 to Rx_BD_Status, 0x0000 to Rx_BD_Length (not required), and
0x0000_1000 to Rx_BD_Pointer.
13. Assuming the Tx buffer is at 0x00002000 in main memory and contains Þve 8-bit
characters, write 0xB000 to Tx_BD_Status, 0x0005 to Tx_BD_Length, and
0x00002000 to Tx_BD_Pointer.
14. Write 0xFF to the SMCE register to clear any previous events.
15. Write 0x17 to the SMCM register to enable all possible SMC interrupts.
16. Write 0x00000010 to the CIMR so the SMC1 can generate a system interrupt.
Initialize the CICR.
17. Write 0x4820 to SMCMR to conÞgure normal operation (not loopback), 8-bit
characters, no parity, 1 stop bit. The transmitter and receiver are not yet enabled.
18. Write 0x4823 to SMCMR to enable the SMC transmitter and receiver. This
additional write ensures that the TEN and REN bits are enabled last.
After 5 bytes are sent, the TxBD is closed. The receive buffer closes after receiving 16
bytes. Subsequent data causes a busy (out-of-buffers) condition since only one RxBD is
ready.
30.4 SMC in Transparent Mode
Compared to the SCC in transparent mode, the SMCs generally have less functionality,
simpler functions and slower speeds. Transparent mode is selected by setting
SMCMR[SM] to 0b11. Section 30.2.1, ÒSMC Mode Registers (SMCMRn)Ó describes
other protocol-speciÞc bits in the SMCMR. The SMC in transparent mode does not support
the following features:
¥
Independent transmit and receive clocks, unless connected to a TDM channel of the
SI
¥
CRC generation and checking
¥
Full RTS, CTS, and CD signals (supports only one SMSYN signal)
¥
Ability to transmit data on demand using the TODR
¥
Receiver/transmitter in transparent mode while executing another protocol
¥
4-, 8-, or 16-bit SYNC recognition
¥
Internal DPLL support
However, the SMC in transparent mode provides a data character length option of 4 to 16
bits, whereas the SCCs provide 8 or 32 bits, depending on GSMR[RFW]. The SMC in
transparent mode is also referred to as the SMC transparent controller.
Summary of Contents for MPC860 PowerQUICC
Page 3: ...MPC860UM AD 07 98 REV 1 MPC860 PowerQUICC ª UserÕs Manual ...
Page 36: ...xxxvi MPC860 PowerQUICC UserÕs Manual MOTOROLA CONTENTS Paragraph Number Title Page Number ...
Page 78: ...I iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
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Page 226: ...8 32 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
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Page 274: ...III iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part III Configuration ...
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Page 325: ...MOTOROLA Part IV Hardware Interface IV v Part IV Hardware Interface ...
Page 326: ...IV vi MPC860 PowerQUICC UserÕs Manual MOTOROLA Part IV Hardware Interface ...
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Page 998: ...37 48 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part VI Debug and Test ...
Page 1016: ...A 10 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
Page 1024: ...B 8 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
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