7-12
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual
MOTOROLA
AC Electrical Characteristics
7.3.4
Serial Data Link Timing
The following section provides the serial data link timing for the MC92603. Figure 7-8
provides the link differential output timing diagram.
Figure 7-8. Link Differential Output Timing Diagram
Table 7-12 provides the link differential output timing specifications.
Figure 7-9 provides the link differential input timing diagram.
Figure 7-9. Link Differential Input Timing Diagram
Table 7-13 provides the link differential input timing specifications.
Table 7-12. Link Differential Output Specifications
Symbol
Characteristic
Min
Max
Unit
T
j
Total jitter
1
1
Measured between 50–50 percent points.
—
0.24
UI
T
dj
Deterministic jitter
1
—
0.12
UI
T
ds
Differential skew
1
—
25
ps
X
la
Transmit latency
2
2
Rising edge XMIT_x_CLK to bit 0 transmit.
—
57
bit-times
Table 7-13. Link Differential Input Timing Specifications
Symbol
Characteristic
Min
Max
Unit
T
r
Link input rise time
1
1
Measured between 10–90 percent points.
300
—
ps
T
f
Link input fall time
1
300
—
ps
T
jtol
Total jitter tolerance
2, 3
2
Measured between 50–50 percent points, 125 MHz REF_CLK, 1.25 Gbaud.
3
Per IEEE Std 802.3 specification [4].
0.71
—
UI
T
djtol
Deterministic jitter tolerance
2, 3
0.45
—
UI
T
dstol
Differential skew tolerance
2, 3
175
—
ps
R
lat
Receive latency
4
4
Bit 0 at receiver input to parallel data out (RCCE = high, WSYNC1 and WSYNC0 = low).
—
127 bit-times
T
acq
Receiver phase acquisition time
—
TBD
5
5
Measured with worst-case eye opening, Idle pattern, and reference PLL locked.
bit-times
T
j
T
ds
XLINK_x_N
XLINK_x_P
T
dstol
RLINK_x_N
RLINK_x_P
T
jtol
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