Motorola M68EML08EY, User Manual, Page: 27 / 36

Support Information
Inverted Clock Connector J4
User’s Manual M68EML08EY Emulation Module - Version 1.0
MOTOROLA Support Information 25
Figure 3-4 Logic Analyzer Connector J5 Pin Assignments
3.4 Inverted Clock Connector J4
Connector J4 is the source for an inverted clock signal. Figure 3-5 and
Table 3-5 give the pin assignments and signal descriptions for this connector.
Because the OSC2 signal is not present on the target cable, you should connect
this signal to your target system if you will use the OSC2 signal.
Figure 3-5 Connector J4 Pin Assignments
J5
NC 1
• •
2 NC
ECLK 3
• •
4 A15
A14 5
• •
6 A13
A12 7
• •
8 A11
A10 9
• •
10 A9
A8 11
• •
12 A7
A6 13
• •
14 A5
A4 15
• •
16 A3
A2 17
• •
18 A1
A0 19
• •
20 GND
Table 3-4 Logic Analyzer Connector J5 Signal Descriptions
Pin Label Signal
1, 2 NC No connection
3 ECLK EM CLOCK — Output clock signal for the emulator module.
4 — 19 A15 — A0 LATCHED ADDRESS BUS (lines 15—0) — Output showing the
address of the current bus cycle.
20 GND GROUND
J4
•
3 GND
•
2
•
1 OSC2
Table 3-5 Connector J4 Signal Descriptions
Pin Label Signal
3 GND Ground