June, 2000
6880905Z99-O
8-13
GTX LTR/Privacy Plus 800 MHz Mobile Service Manual
Theory of Operation
Controller Audio & Signaling Circuits
parator to produce an active high signal on CHACT. A
squelch tail circuit is used to produce SQDET
(U201-H1) from CHACT. The state of CHACT and SQ
DET is high (logic 1) when carrier is detected, other-
wise low (logic 0).
CHACT is routed to U101-25 while SQDET adds up
with LOCK_DET, weighted by resistors R113 and R114,
and is routed to an A/D converter input U101-43. From
the voltage weighted by the resistors the
µ
P deter-
mines whether SQDET, LOCK_DET or both are active.
SQDET is used to determine all audio mute/unmute
decisions except for Conventional Scan. In this case
CHACT is a pre-indicator as it occurs slightly faster
than SQDET.
Audio Processing and Digital Volume Control
The receiver audio signal enters the controller section
from the IF IC (U5201-28) on DET_AUDIO and passes
through RC filter R203 and C208 which filters out IF
noise. The signal is AC coupled by C207 and enters the
ASFIC via PLIN U201-J7.
Inside the ASFIC, the signal goes through two paths in
parallel, the audio path and the PL/DPL path.
The audio path has a programmable amplifier, whose
setting is based on the channel bandwidth being
received, then a LPF filter to remove any frequency
components above 3000Hz and then an HPF to strip off
any sub-audible data below 300Hz. Next, the recov-
ered audio passes through a De-emphasis filter to com-
pensate for Pre-emphasis which is used to reduce the
effects of FM noise. The IC then passes the audio
through the 8-bit programmable attenuator whose
level is set depending on the value of the volume con-
trol. Finally the filtered audio signal passes through an
output buffer within the ASFIC. The audio signal exits
the ASFIC at RX_AUDIO (U201-J4).
The
µ
P programs the attenuator, using the SPI bus,
based on the volume setting. The minimum /maxi-
mum settings of the attenuator are set by codeplug
parameters.
Since sub-audible signalling is summed with voice
information on transmit, it must be separated from the
voice information before processing. Any sub-audible
signalling enters the ASFIC from the IF IC at PLIN
U201-J7. Once inside it goes through the PL/DPL path.
The signal first passes through one of 2 low pass filters,
either PL low pass filter or DPL/LST low pass filter.
Either signal is then filtered and goes through a limiter
and exits the ASFIC at PLLIM (U201-A4). At this point
the signal will appear as a square wave version of the
sub-audible signal which the radio received. The
microprocessor, U101-10 will decode the signal directly
to determine if it is the tone/code which is currently
active on that mode.
Audio Amplification Speaker (+) Speaker (-)
The ASFIC’s received audio signal output, U201-J4, is
routed through a voltage divider formed by R401 and
R402 to set the correct input level to the audio PA
(U401). This is necessary because the gain of the audio
PA is 46 dB, and the ASFIC output is capable of over-
driving the PA unless the maximum volume is limited.
The audio then passes through C401 which provides
AC coupling and low frequency roll-off. C402 provides
high frequency roll-off as the audio signal is routed to
pins 1 and 9 of the audio power amplifier U401.
The outputs of the Audio PA (U401 pins 4 and 6) are
routed to the external speaker via the accessory con-
nector (J400-16 EXT SPKR+, and J400-1 EXT SPKR-,
respectively). One terminal of the radio’s internal
speaker (+) is connected to J400-13 (INT SPKR+), and
the other (-) to U401-6. To enable the internal speaker, a
jumper plug is inserted into J400 which connects pins
13 and 16 together. This completes the path between
the audio power amp U401-4 and the internal
speaker’s (+) terminal.
The audio power amplifier has one inverted and one
non-inverted output that produces the differential
audio output OUT1 and OUT2 (U401-4 & 6). The
inputs for each of these amplifiers are pins 1 and 9
respectively; these inputs are both tied to the received
audio. The audio PAs DC bias is not activated until the
audio PA is enabled at pin 8.
The audio PA is enabled via AUDIO_PA_ENABLE sig-
nal from the ASFIC (U201-B5). When the base of Q401
is low, the transistor is off and U401-8 is high, using
pull up resistor R406, the audio PA is ON. The U401-8
must be above 8.5VDC to properly enable the device. If
the voltage is between 3.3 and 6.4V, the device will be
active but has its input (U401-1/9) off. This is a mute
condition which is not employed in this radio design.
R404 ensures that the base of Q401 is high on power
up. Otherwise there may be an audio pop due to R406
pulling U401-8 high before the software can switch on
Q401.
The audio PA can also be muted externally when in the
Data Modem mode, which is selected by turning
switch S401 (1-3) off. This forces analog switch control
line U402-9 high via R442, changing its state. If J400-12
is pulled low, this is transferred via pins 14 and 1 of
U402 to the base of Q415, turning it on and, in turn,
Q401 on. This pulls U401-B low, muting the audio PA.
The E and EXT_SPKR- outputs of the audio
PA have a DC bias which varies proportionately with
FLT A+ (U401-7). FLT A+ of 11V yields DC offset of 5V,
and FLT A+ of 17V yields a DC offset of 8.5V. If either
of these lines is shorted to ground, it is possible that the
audio PA will be damaged. The audio PA contains
internal short-circuit protection, however this situation
should be avoided. E and EXT_SPKR- are
