Motorola E685, Service Manual, Page: 22 / 97

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① Microprocessor (ARM926EJ-S) Subsystem
The ARM926EJ-S embedded microprocessor supports some features such as : 16KB Instruction
and 16KB Data cache, ARM v5TEJ instructions set, Higher performance 5 stage pipeline, Harvard
cached architecture. The MSM6100 is designed to dual memory buses separating the memory
subsystem from low-speed peripherals such as LCD panels. Thus, two memory interfaces are
available in MSM6100 to support accesses to asynchronous NOR FLASH and SRAM,
asynchronous page mode NOR FLASH, pseudo-RAM, burst mode FLASH, SDRAM and NAND
FLASH. In particular, the MSM6100 allows booting from the NOR Flash or from the internal Boot
SRAM used for when booting from NAND Flash. The EBI1 (External Bus Interface 1) can interface
32-bits bus mode for high-speed operation and has four chip selects. And the EBI2 (External Bus
Interface 2) can connect to the slave devices using 16bits or 8bits bus and has five chip selects.
Therefore, the MSM6100 can be directly interfaced to several slave devices without dummy logic.
In normal operation mode, the microprocessor uses the TCXO clock (19.2MHz). And In sleep
mode, it uses the auxiliary clock of 32.768 KHz for saving power consumption.
② Stereo Wideband CODEC
The wideband codec allows the MSM device to support stereo music/ringer melody applications in
addition to the 8KHz voice band applications on the forward link. In the audio transmit path, the
device operates as 13-bit linear converter with software selectable 8KHz and 16KHz sampling rate.
In the audio receive path, the device operates as a software selectable 13-bit or 16-bit linear
converter with software selectable 8KHz, 16KHz, 22.05KHz, 24KHz, 32KHz, 44.1KHz or 48KHz
sampling rate. Through software, the Rx path can be configured as either a mono or stereo output.
③ CDMA BLOCK 및 RFR6125/RFT6120 INTERFACE
The CDMA Subsystem performs the digital IS-94-A/B and IS-2000 signal processing. Its
components include searcher engine, demodulation fingers, combining block, frame deinterleaver
and viterbi decoder. The RF interface communicates with the mobile station’s external RF circuits.
The MSM6100 interfaces the RFT6120 through TX_IOUT and TX_QOUT signal. Also it receives
output of the RFR6120-1 using RX_IDATA and RX_QDATA signal. In case of digital interface to RF
devices, the MSM6100 assigns SBI bus to the RFR6120-1 and AUX_SBI bus to the RFT6120 for
control and monitor.
④ RF INTERFACE
▶ Transmission part
The PA_ON and the TX_AGC_ADJ output signal of the MSM6100 control on/off of the power AMP
and the power level of the TX AGC AMP.