2-2
Optimizing DSP56300/DSP56600 Applications
MOTOROLA
Data Operations
Using the Dual Data Paths
There are two ways to generate the operand addresses for parallel
moves:
• XY addressing—Two address registers are used
independently, one generating an operand address for the X
memory and the other for the Y memory. The FIR example
above is of this kind. The address registers must be of
different “banks”, meaning that if an address register R0–3 is
used for one data field, an address register R4–7 should be
used for the other data field. No absolute addresses are
allowed in this mode.
• Long addressing—One address register or absolute address
is used to generate the address for both the X memory and
the Y memory. For example:
mac
x0,x1,a
l:(r0)+,X
The syntax L:(R0)+,X is equivalent to moving X:(R0) to X0 and
Y:(R0) to X1, then incrementing R0. The name “long addressing”
refers to the fact that such addressing enables to access two data
registers as if they were one 48-bit long register.
Not all the DSP56300/DSP56600 instructions support parallel
moves. In general, the instructions that do are a subset of the
arithmetic instructions. The full list of these instructions appears in
.
Table 2-1
Parallel Move Instructions
Instruction
Mnemonic
Relevant
Opcode variants
Absolute Value
ABS
Add Long with Carry
ADC
Add
ADD
Non-immediate
Shift Left and Add Accumulators
ADDL
Shift Right and Add Accumulators
ADDR
Logical AND
AND
Non-immediate
Arithmetic Shift Accumulator Left
ASL
Single bit,
non-immediate
