Chapter 12. Universal Serial Bus (USB)
12-27
Register Description and Programming Model
12.3.2.19 USB Endpoint 0–7 Data Present Registers (EPnDPR)
Figure 12-23 shows the USB endpoint 0-7 data present registers. used to coordinate user
access to FIFO with external devices to prevent data loss (overwrite) says how much free
space is still available. Gives amount of data just received.
Figure 12-22. USB Endpoint 0-7 Data Present Registers
(
EP
n
DPR)
Table 12-18 describes EPDPn fields.
12.3.3 Configuration RAM
The USB module supports up to 1 KByte of USB descriptors. The configuration RAM
begins at address MBAR + 0x1400 and is longword accessible only.
EPCTL0[CFG_RAM_VAL] must be cleared to access the configuration RAM, otherwise
an access error results.
12.3.3.1 Configuration RAM Content
The USB host must configure a device before that device’s function can be used. The host
configures the device by first reading the descriptors for the device. The descriptors must
follow the format described in Chapter 9 of the USB specification and any relevant class
specification.
NOTE:
The USB descriptors use little endian format for word and
longword fields. The MCF5272 uses big endian format for
15
9
8
0
Field
—
DATA_PRES
Reset
0000_0000_0000_0000
R/W
Read
Addr
MBAR + 0x10CE, 0x10D2, 0x10D6, 0x10DA, 0x10DE, 0x10E2, 0x10E6, 0x10EA
Table 12-18. EP
n
DPR Field Descriptions
Bits
Name
Description
15–9
—
Reserved, should be cleared.
8–0
DATA_PRES Endpoint n data present. This field reflects the number of bytes in the endpoint’s FIFO.
This field is updated when the user writes to or reads from the FIFO and when the control
logic accesses the FIFO. For non-isochronous endpoints, the FIFO level is only updated
when a complete packet is received or transmitted without any errors. This occurs
synchronously with an EOP interrupt. For isochronous endpoints, the FIFO level is
updated by the control logic in real-time rather than only after the transfer of a complete
packet.
Note: for non-isochronous OUT endpoints, this field is frozen while an EOT interrupt is
pending in order to allow the user to determine the number of bytes to read for the last
transfer. For endpoint 0, EPDP0 monitors the OUT FIFO only.
Summary of Contents for DigitalDNA ColdFire MCF5272
Page 1: ...MCF5272UM D Rev 0 02 2001 MCF5272 ColdFire Integrated Microprocessor User s Manual ...
Page 38: ...xxxviii MCF5272 User s Manual TABLES Table Number Title Page Number ...
Page 58: ...1 10 MCF5272 User s Manual MCF5272 Specific Features ...
Page 90: ...2 42 MCF5272 User s Manual Exception Processing Overview ...
Page 96: ...3 6 MCF5272 User s Manual MAC Instruction Execution Timings ...
Page 158: ...5 46 MCF5272 User s Manual Motorola Recommended BDM Pinout ...
Page 184: ...7 12 MCF5272 User s Manual Interrupt Controller Registers ...
Page 338: ...13 44 MCF5272 User s Manual Application Examples ...
Page 414: ...18 6 MCF5272 User s Manual PWM Programming Model ...
Page 452: ...19 38 MCF5272 User s Manual Power Supply Pins ...
Page 482: ...20 30 MCF5272 User s Manual Reset Operation ...
Page 492: ...21 10 MCF5272 User s Manual Non IEEE 1149 1 Operation ...