fA
•
111
The rectified signal then passes through to the input of the DC integrator U11 which filters and amplifies the waveform
to produce a noise free DC output signal. The signal is adjusted to the proper full scale of 10 volts with the coarse
span adjust R70 and is filtered once more by L1 and C37 and then applied to the proper output connectors.
The demodulator drive provides a fast switching waveform that is synchronized with the oscillator to drive the switch-
ing FET's in the demodulator (synchronous detector), and is done by applying the oscillator input voltage to the
comparator U15. When the oscillator crosses through zero the comparator switches, one output goes high while
the other goes low. These outputs are applied to the high speed "flip flop" that is formed by 015-018. The demodulator
drive circuit increases the switching speed and produces a waveform that switches between ± 13 volts. This waveform
and its complement are connected to the switching FET's through C28, C29.
OVERRANGE DETECTOR: See Figure E - Section B
When the output from the AC to DC converter exceed ± 11 volts, the amplifiers are entering their saturation region
and may become non linear. This comparator will go to a high state whenever the input exceeds ± 11 volts and
will turn on transistor 01 which blanks the display on the panel meter.
RANGE SELECTION CIRCUITS: See Figure F - Section D
The range selection circuit provides a means to select the proper sensitivity range either by the manual range
switch or by the external control connector and to provide decimal point infomration to the panel meter. The switch-
ing is based on the principle that the X1 range is selected by the absence of a command to the X0.1 or X0.01 ranges.
The command to select the X0.1 or X0.01 range by the range switch is done by applying a ground closure via S1
while the REMOTE position is left in the hi state to "LOCKOUT" any commands from the REMOTE connector.
Nand gate U7 produces the range commands which are applied to U8. U8 interfaces the digital logic levels to the
higher levels required to drive the switching FET's. U5 selects the proper decimal command to be sent to the AC-
CESSORY connector.
In the REMOTE position the "LOCKOUT" is defeated and commands from the REMOTE connector can be entered
through U5. The outputs of U5 are passed through the "LOCKOUT" gates (U6) to the inputs of U7. At this point
the range selection is identical to the process described above.
DIGITAL INTERFACE CIRCUITS: See Figure G - Section A
The placement of the decimal point is determined by the position of the DISPLAY UNITS selector, RANGE SELEC-
TOR and the SENSOR RANGE selector. This is done by creating a BCD number for each switch position and then
adding these numbers together. These numbers are indicated on the schematic as logic code numbers and are
processed in the following manner:
1. The DIPSLAY UNITS selector generates a logic code which is applied to the A inputs of U1.
2. The RANGE ID's generate a logic code which is applied to the B inputs of U1.
3. The sum of the A&B inputs is applied to the B inputs of U2.
FOR
EXAMPLE:
The TORR setting of Si generates a code of 2L and X1 gain position generates a code of 2L.
The sum, 4L, is applied to the B inputs of U2.
4. The SENSOR RANGE selector, or the multiplex unit when in use, is connected to a digital interface circuit which
generates a BCD number for each position of the switch.
FOR EXAMPLE:
The 1000 range generates a logic code of 4L which applied to the A inputs of U2,
5. The sum of U2, 8L, is then applied to the decoder, U3. This causes the 8 output to go high and activate the
1000.0 decimal point.
4-4
