Mitsubishi Electric MELSEC iQ-F FX5, Programming Manual

Page: 333 / 1112

7 BASIC INSTRUCTIONS
7.5 Data Conversion Instructions
331
7
Seven Segment With Latch
SEGL
This instruction controls one or two sets of 4-digit seven-segment display units having the latch function.
Setting data
■
Descriptions, ranges, and data types
■
Applicable devices
*1 Only Y can be used.
Processing details
The 4-digit numeric value stored in (s) is converted into BCD data, and each digit is output to the seven-segment display unit
with the BCD decoder by the time division method. For (s), binary data ranging from 0 to 9999 is valid.
Set the parameters (n) as follows according to the positive/negative logic of the PLC and the positive/negative logic of the
seven-segment display module.
Ladder diagram Structured text
ENO:=SEGL(EN,s,n,d);
FBD/LD
Operand Description Range Data type Data type (label)
(s) Head device converted into the BCD format 0 to 9999 16-bit signed binary ANY16
(d) Head Y number to be output  bit ANY_BOOL
(n) Parameter number 0 to 7 16-bit unsigned binary ANY16_U
EN Execution condition

Bit BOOL
ENO Execution result  Bit BOOL
Operand Bit Word Double word Indirect
specification
Constant Others
X, Y, M, L, SM,
F, B, SB, S T, ST, C, D, W,
SD, SW, R U  \G  Z LC LZ K, H E $
(s)
          
(d) 
*1
         
(n)           
PLC output logic Data input Strobe signal Parameter "n"
4 digits

1 set 4 digits

2 set
Negative logic Negative logic (match) Negative logic (mismatch) 0 4
Positive logic (match) 1 5
Positive logic (mismatch) Negative logic (mismatch) 2 6
Positive logic (match) 3 7
Positive logic Positive logic (match) Positive logic (match) 0 4
Negative logic (mismatch) 1 5
Negative logic (mismatch) Positive logic (match) 2 6
Negative logic (mismatch) 3 7
(s) (d) (n)
EN ENO
s d
n