Fig.3-4-1-A
4. BLOCK DIAGRAMS
4-1. (A) Overall Block Diagram - DD-6030
PUH
Display-CPU
Display
(FL)
Feed
Motor
Tray
Motor
PUH Driver
Motor Driver
1M-DRAM
Decryption,
Video Process,MPEG-2 Decoder
Dolby-Digital Decoder, OSD
MAIN CPU
64M-S-DRAM
1chip-SERVO
Data Processor
SPM
VIDEO LPF
with
AMPLIFIRE
Composite
Video Out
S Video Out
Y,C
B
,C
R
Video
Out
Coaxial
Digital
TOS Link Digital
Audio Out
22.5792
MHz
Xtal
E2PROM
RF Amp.
Data/Control Bus
DVD AV Data
SP DIF Data
Buffer
LPF &
Amplifier
Audio Out
FL, FR Analog
Audio Out
SW POWER SUPPLY
FRONT DISPLAY UNIT
MAIN PROCESSOR UNIT
AUDIO/VIDEO OUTPUT UNIT
IC502
TA1323F
X501
Xtal
27MHz
IC503
BA5813FM
IC312
S24C02BFJ
IC402
M11B11664A-30T
IC401
TC94A03F
IC101
TMP86CK74AFG-3UA6
IC305
MT48LC2M32B2
32M-FRAM
IC309
MBM29DV324BE
IC902
AD1958
IC306
ZR36750
ICY02
TC74HCU04AF
ICY01
NJM4580E
ICX01
MM1568
AV
Master Clock
Audio DAC
+ PLL
Summary of Contents for DD-6030
Page 40: ...m Q502 Q501 PUDET2 IC306 Fig 3 4 6 4 4 Main Block Diagrams 4 4 1 Servo System Block Diagram ...
Page 46: ...Fig 3 5 3 5 2 Front Display Power Switch Circuit Diagram ...
Page 49: ...Fig 3 5 5 5 3 2 Main Circuit Diagram ...
Page 50: ...5 3 2 Main Circuit Diagram ...
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Page 57: ...Fig 3 5 5 ...
Page 58: ...Fig 3 5 6 A 5 4 A Output Circuit Diagram DD 6030 ...
Page 59: ...5 4 A Output Circuit Diagram DD 6030 ...
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Page 64: ...Fig 3 5 6 A ...
Page 66: ...5 4 B Output Circuit Diagram DD 8030 Fig 3 5 6 B ...
Page 67: ...5 4 B Output Circuit Diagram DD 8030 ...
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Page 72: ...Fig 3 5 6 B ...
Page 74: ...10 1 3 4 A B C D E G 2 5 6 7 8 9 F 5 5 Motor System Circuit Diagram Fig 3 5 8 ...