MITS altair 8800b Documentation Download Page 19

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Summary of Contents for altair 8800b

Page 2: ...ycle 3 20 3 18 External Device to CPU Data Transfer 3 25 3 21 CPU to Memory Data Transfer 3 30 3 23 Memory Write Cycle Detailed Operation 3 32 3 24 Memory to CPU Data Transfer 3 34 3 25 CPU to Externa...

Page 3: ...r 8800b Front Panel 2 1 3 1 3 2 3 3 3 4 3 5 3 6 3 8 3 9 3 10 3 11 3 12 3 13 3 14 3 15 3 15 3 15 3 16 3 16 3 16 11 8800b 81 ock Diagram 3 11 Instruction Fetch Cycle Bloc Diagram 3 17 Inst ruction Fetc...

Page 4: ...Jumper Connections 5 26 Display Control Suppressor Capacitor Installation 5 27 Display Control Capacitor Installation 5 28 Display Control Diode and Ferrite Bead Installation 5 29 Display Control Volt...

Page 5: ...tachment 5 56 Connector Pin and Connector Socket Wire Ins1 rtion 5 57 Pin and Socket Housing Assembly 5 57 Wiring Diagram 5 58 Bridge Rectifier Installation 5 60 Fan Mounting 5 61 Fuse Holder Installa...

Page 6: ...N I INTRODUCTION 1 3 DESCRIPTION The ALTAIR 8800b computer Figure 1 1 is a general purpose byte oriented machine 8 bit word It uses a common 100 pin bus struc ture that allows for expansion of either...

Page 7: ...0 i _ i_ fl l J W _ l _ e 1 _ _ _ b r _ _ _ _ j oc u _ it n I 11 l t ne _ c i i 7 r v i _ P l t _ yw _ _ _ ri W1 iiff t t1 fe CD1ctilf Figure 1 2 Power Supply Board 0 Figure 1 3 Interface Board 1 2...

Page 8: ...ter timing circuit eight input and eight output data lines to the ALTAIR bus control circuits 1 7 DISPLAY CONTROL BOARD Figure Eli The Display Control Board conditions all ALTAIR 8800b front panel swi...

Page 9: ...1 4 Figure 1 5 0 Figure 1 4 CPU Board Display Control Board 0...

Page 10: ...0 SECTION II C OPERATORS GUICE 0 PAGE 2 1 2 2 Blank...

Page 11: ...er Systems Users Manual is provided for this purpose Also additional programs avail able to the user are described in the ALTAIR Software Library Up date information is contained with your unit 2 2 FR...

Page 12: ...selected SLOW position allows execu tion of machine or instruction cycles at a rate of approximately 2 cycles per second Normal speed is approximately 500 000 machine cycles per second The CPU will ex...

Page 13: ...flag in the CPU The EXT CLR position produces an external clear signal on the system bus which generally clears an input output The PROTECT position conditions the write protect circuits on the curren...

Page 14: ...t an address in memory or to enter data The up position denotes a one bit and the down position denotes a zero bit The upper eight address switches A8 A15 also function as SENSE switches The data pres...

Page 15: ...ndication The CPU is in a halt condition The address bus contains the address of the stack pointer The CPU is writing out data to an external device or memory The CPU has acknowledged an interrupt req...

Page 16: ...nce Step Function Indication 1 Position the POWER ON MEMR Ml and WAIT indica OFF switch to ON tors are on Some DATA 00 07 indicators may also be on All other indicators are off 2 5 RUN OPERATION Table...

Page 17: ...t a memory address and examine its contents Table 2 5 Examine Memory Operation Step Function Indication 1 Position the address switches Ao Al5 down 2 Position the EXAMINE AO through Al5 indicators are...

Page 18: ...switches up Position the DEPOSIT OEP DATA DO through 07 indi NEXT to DEPOSIT caters are on indicating the new data that has been placed in address location 0408 2 9 EXAMINE NEXT MEMORY LOCATION Table...

Page 19: ...icator is on in dicating memory address 0408 DATA DO through D7 iridicators a e on A5 and AO indicators are on indicating address 0418 DATA Dl D4 and D6 indicators are on 2 10 ALTER NEXT MEMORY LOCATI...

Page 20: ...h 07 are on 2 11 LOADING AND DISPLAYING ACCUMULATOR DATA Table 2 9 This procedure allows the operator to load new data into the accumulator or check the contents of the accumulator Step l 2 3 Table 2...

Page 21: ...d memory address JMP Jump to the first step in the program Step 5 the JMP instruction followed by the memory address of the first instruction causes the CPU to jump back to the beginning of the sample...

Page 22: ...s Move Accumulator data to Register B Load Accumulator with the contents of Memory address 201 8 Add Register B to Accumulator Store the Accumulator contents in Memory address 2028 Jump to Memory loca...

Page 23: ...switches the program may now be entered into the computer To begin loading the program at the first memory address 000 position the RESET CLR switch to RESET The data to be stored in address 000 is en...

Page 24: ...DEPOSIT NEXT 002 00 000 000 DEPOSIT NEXT 003 01 000 111 DEPOSIT NEXT 004 00 111 010 DEPOSIT NEXT 005 10 000 001 DEPOSIT NEXT 006 00 000 000 DEPOSIT NEXT 007 10 000 000 DEPOSIT NEXT 010 00 110 010 DEPO...

Page 25: ...and position the DEPOSIT DEP NEXT switch to DEP NEXT Since sequential memory addresses were selected the number will be loaded automatically into the proper address 10 000 001 2 Once the program has...

Page 26: ...0 0...

Page 27: ...0 SECTION Ill C THEORY OF OPERATION C PACE 3 1 13 2 Blank...

Page 28: ...I I l l I I i 0 0 0...

Page 29: ...ically the same The active state of the inputs and outputs of the logic circuits is graphically displayed by small circles A small circle at an input to a logic circuit indicates that the input is an...

Page 30: ...i I l i lI l l 0 0...

Page 31: ...ic functions Any of the inputs need be enabled HIGH to produce the desired LOW output The inverter is an amplifier whose output is the opposite state of the input A A L 1 I The non inverting bus drive...

Page 32: ...dependent of the clock asynchronous If a signal is applied to the D input the flip flop Q output is directly affect 0 ed on the positive edge of the clock 0 truth table The information on the D inputs...

Page 33: ...AL 1 01 11 Output data from a device is present on the DI0 DI 3 lines and is enabled when DTEN and CS are LOW lines DB0 DB3 transfer the data to the receiving unit Input data to the device is present...

Page 34: ...2 DS2 mode MD and strobe STB are HIGH a LOW device selection 1 DS1 allows the input data to be present on the oo0 oo7 outputs When data is presented to the D1o DI7 inputs and MD and STB are HIGH a HIG...

Page 35: ...Ao 21 A3 20 A4 19 A5 18 17 A7 14 cs 001 002 003 4 5 6 004 7 LOGIC SYMBOL 005 006 007 8 9 10 00a 11 DESCRIPTION When the chip select input CS is LOW the binary address at input A 0 through A 7 is deco...

Page 36: ...isheet schematic 3 5 8800b BLOCK DIAGRAM DESCRIPTION Figure 3 1 The 8800b computer contains four basic circuits the Central Processing Unit CPU Memory an Input Output I 0 section and the Front Panel T...

Page 37: ...I J J 0 CPU ROY PDBIN ADDRESS A0 A15 STATUS MEMORY OR Jo DEVICE BI DATA 00 07 _ DATA IN DIQJ Dl7 BC _r 1 j DATA OUT DO i1 D07 1 V I I I _ _ FDl il FDI7 FRONT PANEL BC _ _J Figure 3 1 8800b Basic Bloc...

Page 38: ...rocess data 3 7 FRONT PANEL OPERATION The Front Panel Operation is very similar to Memory or I 0 section operation The Front Panel gains control of the CPU by producing a HIGH BC signal The BC signal...

Page 39: ...l zone C6 insuring that single step operation is disabled It presets the Ml flip flop zone C9 and disables NANO gate Pl zone 88 to insure that the 8800b is not running The POC signal zone 09 is also p...

Page 40: ...quad latch Cl input 02 The occurrence of the next C13 clock zone Al causes the Q output at pin 6 of Cl zone 89 to go HIGH This HIGH is applied to quad latch Nl input 02 The next Cl3 clock causes the Q...

Page 41: ...eeded to a11ow the CPU to fetch an instruction from memory A C memory read machine cycle is also a basic machine cycle that enables the CPU to communicate with a memory or external device for data tra...

Page 42: ...ht the Ml machine cycle 1 LED on the 880Gb front panel The SMEMR and 01 CLOCK outputs are applied to memory to allow decoding of the memory address 000 1008 With the memory address decoded the 072 dat...

Page 43: ...0 f DIG 1 SMEMR SMl ADDRESS A A15 R s AO Al 5 t ONTROL PSYNC i r 1 Clock iiiiiiiftII l i DATA INPUT Dlo DI7 Figure 3 2 Instruction Fetch Cycle Block Digaram 0...

Page 44: ...3 18 j I I QI _j ____ PSYNC P D B I N I I I i i BYTE ONE I J I p YR t _1 _ STATUS SMEMR INFORMATION M1 Figure 3 3 Instruction Fetch Cycle Timing 0 0 0...

Page 45: ...signal conditions memory to decode the address data The SYNC input at F will enable a signal during T2 During the beginning of T2 a low STST8 zone B7 is generated from Fas a result of the HIGH SYNC i...

Page 46: ...e cycle one allows for 8080 process ing of the received instruction data from memory If the instruc tion data present in the CPU requires a data transfer to or from an external device a memory read cy...

Page 47: ...w I N __ 0 0 DIG 1 PSYNC I ADDREss A1sA1s 1 mtttrr x S R l filiii 1 SMEMR ADDRESS PSYNC i A Al5 DATA IN Dl 017 Figure 3 4 Memory Read Cycle Block Diagram...

Page 48: ...st MeLJ ory Read Cyc1e is initiated Several signals are generated by the CPU in order to read the LSBs of the address 2008 from memory A PSYNC output from the CPU is applied to memory through the Inte...

Page 49: ...er portion of Tl several outputs are generated by the CPU Figure 3 14 Address data A0 through AlS zone 88 status data D0 through D7 and a SYNC signal zone CB The A0 through Al5 data is presented to me...

Page 50: ...i 3 v i I i 2 Lt U LnlJ i I A I 0 BYTE BYTE ONE TWO ST TUS Lss s ST TUS Mss s D 7 0 PD BIN _ ___ __ PW 8 TATU S t i INFORMATION SMEMR SMEMR Fi gur e 3 5 Memory Read Cycle Timing 3 24 0 0 0...

Page 51: ...Yand S zone 83 by the PDBIN signal C At the latter portion of T2 and the beginning of T3 a OBIN output zone C8 HIGH is generated by M The OBIN output is applied to the DIEN inputs zone C7 of Dand E an...

Page 52: ...lluminate the NP input and ADDRESS LEDs on the 8800b front panel 3 20 INPUT READ CYCLE DETAILED OPERATION The following paragraphs describe the Input Read Cycle operation in detail Refer to Figure 3 7...

Page 53: ...w I N J o 0 SINP AO Al5 SINP ADDRESS AO A7 DATA IN DI0 DI7 Figure 3 6 Input Read Cycle Block Diagram...

Page 54: ...I 1 i 3 28 0 Jl I I _1 Ll l_ J 1 0 DE llCE NU SE I J PSYNC P D 8 I N WR j STATUS ___ INFORMATION SINP Figure 3 7 Input Read Cycle Timing 0...

Page 55: ...NP signal A SINP output from K is presented HIGH on pin 46 of the bus zone A4 through non inverting bus driver R The SINP signal C is applied through inverter Von the Interface Card Figure 3 15 sheet...

Page 56: ...s M2 and M3 The accumulator data is transferred to memory by a Memory Jrite Cycle opera ion M4 3 22 MEMORY WRITE CYCLE BASIC OPERATION Figure 3 8 The Memory Write Cycle operation will allow the CPU to...

Page 57: ...w I w 0 I O MWRITE PWR swo SOUT I M S llii f 111 CONTROL i 1 I ADDRESS A Al5 r Figure 3 8 Memory Write Cycle Block Diagram...

Page 58: ...nals present on the Display Control card Figure 3 16 sheet 3 zones A9 A5 light the appropriate A0 through Al5 LEDs indicating the memory location address The 00 through 07 data is applied to K on the...

Page 59: ...C C C PSYNO MEMORY ADDRESS ACCUMULATOR P 081 N i P WR ___ ___ STATUS IN FORMATION __ l WO Figure 3 9 Memory Write Cycle T1m1ng 3 33...

Page 60: ...ed to pin 77 zone 01 of the bus through non inverting bus driver V zone 08 as PWR The PWR signal is inverted HIGH by U on the Interface Card Figure 3 15 sheet 2 zone B3 and applied to pin l of NANO ga...

Page 61: ...operation M3 3 26 QUTPUT WRITE CYCLE BASIC OPERATION Figure 3 10 The Output Write Cycle operation will allow the CPU to output data to an external device After completion of the Memory Read Cycle M2...

Page 62: ...SW ft 4 sour l i 1 i l iij i tt l CONTRO_L_ A0 Al5 ADDRESS I AO Al5 L i D AT A OU T D 0 0 _ D 0 7 _ __ EA L_i DEVICE c J J oCARD J PSYNC Wi t Figure 3 10 Output Write Cycle Block Diagram __ Z 74 7 o...

Page 63: ...y c ontrol card light the appropriate A0 through AlS LEDs indicating the address of the external device The D0 through D7 data is applied to K zone BS on the CPU through bi directional circuits Dand E...

Page 64: ...I I I l I l I I 3 38 r j J 1 T I T 3 T I l I I r i DI ACCUMULATOR PSYNC PD BIN P WR _ STATUS INFORMATION SOUT Figure 3 11 Output Write Cycle Timing C 0...

Page 65: ...nal allows the external device to store the CPU data thus completing the CPU to extern a1 device data transfer 3 28 FRONT PANEL OPERATION A variety of functions may be performed through the operation...

Page 66: ...S tJITCHE Arm DECODII RUN STOP C FRDY CPU RUN PSYNC 005 STSTB 1 I STOP RUN ss CONTROL CONTROL ss SLOW Figure 3 12 Front Panel Block Diagram ss 0 0 I M...

Page 67: ...set the SS Control circuits forcing the CPU to a wait condition 3 30 STOP OPERATION The stop operation allows the operator to use the switches on the 8800b front panel The stop operation is activated...

Page 68: ...by the Interface Card sheet 2 zone A4 and appljed to pin 5 of NANO gate 01 on the Display Control Card Figure 3 16 sheet 2 zone C8 as a HIGH These signals al low NANO gate 01 to produce a HIGH at gate...

Page 69: ...Ml after each machine cycle 3 32 SLOW OPERATION The slow operation is very similar to the single step operation except the slow operation allows the 8800b to execute fnstruction cycles at a very slow...

Page 70: ...is applied to the clock generator F RESIN reset in input zone B7 producing a RESET output to the 8080 M 3 34 PROTECT ANO UNPROTECT OPERATION The protect unprotect operation either prevents any new dat...

Page 71: ...4 Bit Counter conditioning the RA RAl RA2 and RA3 outputs LSBs 0 to zero The RA0 RA7 signals are applied to the PROM and they represent an 8 bit starting address location There are eight different sta...

Page 72: ...CK FROM CPU p DATA OUT PROM RD0 RD7 HALT CLOCK PSYNC STSTB Figure 3 13 PROM Block D1agram 0 TO I iNTERF L rx_ CONTROL S5 ADDRESS 1 LATCH LATCH S4 A8 A15 S3 ADDRESS LATCH A0 A7 S2 _ 8 Al5 A0 A7 S6 S7 S...

Page 73: ...013 Function Set S5 S7 S8 Jam Jump Instruction to CPU Set Sl S7 S8 Jam A0 A7 switch data to CPU Set S2 S7 SB Jam A8 A15 switch data to CPU Clear control latch Stop Set S5 S7 SB Jam NOP instruction to...

Page 74: ...S8 Data in accumulator is transferred to the D0 D7 LEDs Set S5 S7 SB Jam jump instruction to CPU Set S3 S7 SB Jam A0 A7 latch data to CPU Set S4 S7 S8 Jam A8 Al5 latch data to CPU Clear control latch...

Page 75: ...accumulator is transferred to specific I 0 device Set S5 S7 SB Jam jump instruction to CPU Set SJ S7 SS Jam A0 A7 latch data to CPU Set S4 S7 SB Jam A8 Al5 latch data to CPU Clear control latch Stop S...

Page 76: ...f the machine cycle the PSYNC and STSTB signals from the CPU reset the SS Control circuit The S6 control line is enabled from the Control Latch to allow data to be deposited into memory Upon the compl...

Page 77: ...uts are HIGH NANO gate V zone 05 is enabled LOW and CS zone 06 is applied HIGH to the OS2 input of data latch A zone CB With OS2 and OSl enabled the R00 through RD7 data 0138 is latched into A The 013...

Page 78: ...R gate B Figure 3 15 sheet 2 zone C7 on the Interface as a LOW which enables NAND gate B pin 6 LOW PDBIN is HIGH because the CPU is in a wait condition The LOW enables the non inverting drivers F zone...

Page 79: ...A output zone B9 is applied to pins 1 and 5 of NANO gates J zone 06 as a HIGH allowing the CS signal to produce the SB and FDIG2 outputs The SB and FDIG2 signals allow the transfer of the first eight...

Page 80: ...O gate Z zone AB inhibiting any following clock pulses to the 4 bit binary counter thus ending the examine operation 3 38 ACCUMULATOR DISPLAY OPERATION The accumulator ACC display operation allows the...

Page 81: ...zone D6 is applied HIGH to the DS2 input zone C8 The RD0 through RD7 data 0138 is latched into A with DS2 and DSl enabled The 0138 data enables outputs S5 S7 and S8 zone D7 HIGH Output S5 is inverted...

Page 82: ...re 3 14 zone C7 Because the READY line to M zone AB is HIGH the CPU inputs the 3238 data which is interpreted as an output instruction After the completion of the machine cycle the PSYNC and 005 signa...

Page 83: ...crementing the 4 bit binary counter zone C A8 to address 0658 0 Address 0658 enables the SB signal zone D4 as described in address 0618 The CPU performs one machine cycle with SB enabled During the on...

Page 84: ...e data in address location 0708 is present on the RD0 through RD7 outputs 0438 and applied to data latch A zone D8 The data present at latch A is stored by the A output of the 4 bit binary counter zon...

Page 85: ...ing the AS through Al5 address data to be stored in the CPU Address 0748 clears the data latch A zone 07 and allows the CPU to jump to the original P counter address conditioning the CPU for normal op...

Page 86: ...ted through JB and JA zone C3 to gate J which produces a HIGH to the STB input of data latch G zone B4 The HIGH on STB allows the data present on the 000 D07 line zone B6 to be displayed on the 00 07...

Page 87: ...e and negative 5 volt source and a regulated positive 12 volt source These voltages are produced by VRl VR2 and 02 circuits The Interface card Figure 3 19 requires a regulated positive 5 volt source w...

Page 88: ...TAL L__ _J 1 I ___ 0illJ ft f 111___ _ I _ J f i f 3t 1Ci RI JI l 1 l l r r iq ovcc _ Z tM 2 t I ff I I I U 1 Z Z h U U C r ee G J 011 Z lk lt6 jll7 _______t NII l Zll t 021 Tic fu fa I 1 4 l l I i i...

Page 89: ...0 0...

Page 90: ...1 1 1 1 1 1 1 J r r d rtr r t r t r nhMf I I I I I I I t l I 1 1 1 1 1 1 Iii 1 1 1 1 I B c I 1 1 1 1 0 0 0 0 0 Q O Q O Q 1 i 1 1 I I I I I I I 1 1 I sna OOOI 0 Ii ___ r ftf 1 1 1 2 2 C I I I I I I I...

Page 91: ...0 t i 0...

Page 92: ...1M PWAIT r Pi r IWTt flN DA It r STITt i r fJIYNC r f iT c n 1 r I r I f I I I I I II r II 10 IJ 4 II p It I J I h 0 I I j vcc t L t z t II IC I J G e fj o J J YCC4 _ t 10 r II r L r t II r I r I 4 A...

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Page 94: ...CC I 74LSIJ 14 7 1 AJ J Al I 7410 OR 74LS10 97_4_0o OR 74LIOO I 74LS14 14 7 I AJ 74LS04 a JO_ JC I J i I 7420 14 7 SINP I 4 I _lll_J K 2 CII C _ I 1212 24 II SOUT 8 8 2 c c iiwi PWII z c 2 08 II ST8 r...

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Page 96: ...1 I m i I I r o la w j 0 i r I I I I I I I I I I I t I I t 1 I I C Cl C I 0 C 0 fl C N 2 1 t n o 0 0 o 0 i 1 0 i Oo IO c o I n I I I I I ii 0 1 0 i J u C I I e 1 J I 1 i 0 1 1 lo r r tJI ll t f f i7 1...

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Page 98: ...r 1 1 vet I Dl 011 OOltJi 1 1Rl I i cs _ i v vx T_ _i_ i 11 1 o i 1 1 1 1 1 D4 oi c 1 iv v1 __ l 1 1 _ _ _ _ _ _ _ _ lo I 1111 I t tK CIC _ CK 740 RA I l II Ii t I t o l 1 _ __________ _ att 74L S f i...

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Page 100: ...IL __ a o b _ _ e __ _____ 1 _ 2 AAY 1 n I I a _ v I 1r Ln _ 1 5 ____ tf 1 l t Ml ______j n f V r l rL I A 5 cd 1 _1 1 _____ alJ ll Z_______ ________ _ J NJ J V r i 1 E ____ r cc _______ J 10 f l IL 1...

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Page 102: ...8 I _I to1___ __ __ __ TIP 14 D re IC2 I v 0 BLK I 41JIRN 1 110 Y AC Q Y II GREEN 6 UIIN ILK TO PIN I II BLACK I WHT ILK TO PIN 2 Q _ i_ II BLUE 6 ILUE ILK TO PIN II BLACK I WHT BLK TO PIN 2 130 V II...

Page 103: ...0 0 0...

Page 104: ...G CIS 35UF Lsc IUF C3 IUF 3 L6 1 LIS t NH I f voe 0 01 Cl3 02 C 11 Cl2 L SC 35 p5UF IUF T IUF R34 TYPE vcc GRO OTHER REF OESIG TYPE vcc GRO OTHER M 8080A 20 2 74LS04 14 7 J X R V 74368 74LS13 N U P OR...

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Page 106: ...N C _ Ill rn i IY UNR 8 EE3 Lll ND 0 LI 7101 I I LI sv 1111 CYCCI VIII I I Cl TCI 1 IUPP11 18011 ll lJ JI F IJI F ll TCll T C4 L CAP s I lllJPF T IJIF 21 PLACES I f gure 3 19 Interface Voltage Regulat...

Page 107: ...0 0 0...

Page 108: ...2 31 S2 LI L2 3 C9 UNREG ev I I f f 71011 VRI e IIV RE VCC L Pl I I 2 I I I UNREG l8V1 I L _J C9 47JIF CS IJIF C 11 IJI F C4 22JJF LS L M IN S20T OUT VR2 GND R20 a a a IK 01 0 2 4 I vcc t _ _ r f T Cl...

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Page 111: ...11 1 1 Ii f t i 1 1 _ 24st Aia o Sil r All uque l que NM 8 1106 0...

Page 112: ...0 C 0 880Cb May 1977 4 1 4 2 blank...

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Page 114: ...0 SECTION IV C TROUBLESHOOTING AICJS 0...

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Page 116: ...0 C 0 _ ALTAIR 8800b COMPUTER DOCUMENTATION SECTION IV TROUBLESHOOTING AIDS Section IV Troubleshooting Aids is currently being printed and will be shipped to you as soon as possible MITS Inc August 19...

Page 117: ...0 C 0...

Page 118: ...ck which contains tests for voltages and waveforms 4 4 Non PROM Related Switch Problems which concerns the RUN STOP SINGLE STEP SLOW RESET EXTERNAL CLEAR and PROTECT UNPROTECT switches 4 5 PROM Relate...

Page 119: ...0 0 0...

Page 120: ...hecking this component If the correct voltage is not present at the IC 1 Use the schematic to trace the signal back to its original source checking for proper logic operation at each gate 2 Visually i...

Page 121: ...er short or bridge Repair as necessary NOTE If an IC without a supplied socket needs to be replaced you may wish to install a good quality socket with it Because sockets don t have to be removed from...

Page 122: ...lead to emitter Positive lead to base LOW resistance HIGH resistance Negative lead to collector Positive lead to collector HIGH resistance LOW resistance Negative lead to base HIGH 2K ohms or higher L...

Page 123: ...r higher An output in the range of av 2v indicates a problem Note S Voltages can vary 10 When disabled tri state buffers will have various voltages at their outputs C Static Levels 4 8 1 re Levels Tab...

Page 124: ...8 A 4 6 8 10 15 11 19 21 R 15 1 s 1 y 1 3 s 11 9 13 w 13 9 11 s 3 1 u 1 9 11 13 J 8 12 z 5 V 8 J 4 2 El 6 A 13 3 16 sheet 2 of 3 Cl Fl Hl Gl Nl Ul Yl Wl 9 Vl 6 2 4 12 8 10 Zl 2 4 6 8 10 12 Kl 13 Ml 11...

Page 125: ...4 L1 Rl Ml Ml G G K 0 J K B E M A A N N II C C M 0 E F 0 Pfn Static Level 1 to see wavefonn 6 page 4 30 12 HIGH 2 LOW 1 3 5 HIGH 2 13 14 HIGH 1 11 LOW 6 HIGH 10 LOW 11 HIGH 8 HIGH 6 2 12 13 HIGII 2 4...

Page 126: ...to light dimly Table 4 2 Mother Board Static Levels Bus Symbol Name i8 volts Static Level 1 8v 2 18v 3 XRDY 4 VIO 5 VIl 6 7 8 9 10 11 13 17 18 19 20 21 22 23 VI2 VI3 VI4 VIS VI6 VI7 XRDY2 Not Used ST...

Page 127: ...NE 6 41 DI2 DATA IN LINE 2 42 DI3 DATA IN LINE 3 0 43 DI7 DATA IN LINE i 44 SMl Ml Instruction Fetch Cycle HIGH 45 SOUT OUT Output Wri te LOW 46 SINP INP Input Read LOW 47 SMEMR MEMR Memory Read HIGH...

Page 128: ...85 Al3 ADDRESS LINE 13 I 86 A14 ADDRESS LINE 14 87 All ADDRESS LINE 11 I 88 002 DATA OUT LINE 2 0 1 89 003 DATA OUT LINE 3 90 007 DATA OUT LINE 7 91 DI4 DATA IN LINE 4 92 DIS DATA IN LINE 5 93 DI6 DA...

Page 129: ...s 6 Examine the electrolytic and tantalum capacitors for proper polarity 7 Examine the diodes for proper polarity 8 Examine the LEDs for proper polarity 9 Check the color codes on all resistors B Wiri...

Page 130: ...ter on and check for the following voltages on the Power Supply board s terminal block TBl See page 5 58 in the Assembly section of the manual Pin 2 3 4 10 l 7 8 for pin locations Voltage av to lOv un...

Page 131: ...3 If the fuse on the back panel blows a Check for solder bridges on the Power Supply board or the mother board b Check for proper orientation of BR2 on the Power Supply board and BRl on the back pane...

Page 132: ...the computer at address the front panel LEDs should appear as follows LED Condition A Al 5 OFF Ml MEMR WAIT ON D D7 ON If a memory board is present at address the D D7 LEDs will show the random patter...

Page 133: ...ulated output at least av If absent trace continuity back to bus pins 1 and 51 If Ground and sufficient unregulated voltage are present at these pins check pin 2 of the voltage regulator for 5v If vol...

Page 134: ...diode D2 according to the instructions on page 4 6 Replace if neces sary With an ohnvneter set at XlOK or higher check the resistance from the negative side of Cll to Ground A reading of zero ohms ind...

Page 135: ...e absent on the bus pins trace logic through ICs J and Aon the CPU board If 02 or 01 is present at the inputs of IC J or IC A but absent at the outputs check the IC according to the instructions on pa...

Page 136: ...f C4 is wor king properly reinstall C4 and check continuity from the base of Q3 to Vee Repair as necessary The Q3 emitter should be above 2v If not check Q3 according to the in structions on page 4 7...

Page 137: ...e IC s are functioning pro perly look for a short and repair as necessary If absent trace the ill signal through ICs Kl Jl El and Sl to IC Xpin 9 on the Display Control board If any of these ICs have...

Page 138: ...ch does not stop the computer continue with the remaining steps 1n this chart and onto Section 4 4 rf the proper CS signa1 1s rf the CS signa1 does not match waveform 5 present proceed to Step 14 exam...

Page 139: ...d to Section 4 5 0 If Incorrect If absent or incorrect check the logfc operation from IC Sl to pin 2 of IC L Check for a 16 sec square wave pulse at pin 2 of IC L If absent check the IC according to t...

Page 140: ...these lines fail to go HIGH when pin 12 of ICM is HIGH check for shorts and repair as necessary If any of the address or data lights are unlit when RESET is lifted start at the correspo11din11 pin of...

Page 141: ...ollector ICs H K M D B or Fon the Display Control board should produce a voltage of approximately 5v at the cathode lead of the cort esponding LED If this voltage is absent check for shorts Check for...

Page 142: ...K 5V CM 02 CLOCK Waveform 1 shows the clock inputs to the 8080A microprocessor chip itself l I 00 I j _ r 90 I J I I I I J _ I A 1 Jl A L v I I I V V r r I II I 1 I n I i I I 10 I I 1 OS I la II i I I...

Page 143: ...e bus I 00 I I 90 J r I IA I I i f J AIA t I 1 I 10 I o I r 50 MS CM Waveform 2 I 00 r 90 I i I II _ J I I J I I j I A I i I 1 I I J I I I 10 I I I O I il 50 MS CM Waveform t3 I f I I I I I 1v 1 I I I...

Page 144: ...1977 Waveform 4 shows the rn waveform on the D C board for all conditions mw 1 9 2v CM I 00 I 90 10 I a I I I I I I I I I I I I I I I 1 I I I I I II I I I I I I t i I i i 500 ns Ci 1 Wave form lt4 I I...

Page 145: ...S waveforms on the D C board for all conditions I 90 I 10 1 Js I J I I I i 20 1 s CM Waveform 5 I I I I Waveform 6 shows the C6 waveform on the D C board for all conditions la I I I 90 I I I 10 I o i...

Page 146: ...Section 4 4 contains tests for the RESET STOP RUN SINGLE STEP SLOW PROTECT UNPROTECT SENSE and STATUS circuitry If problems involving the PROM related switches also exist solve the non PROM related s...

Page 147: ...rd to bus pin 75 which should be LOW when the RESET swfrch is lifted A LOW l RESET signal should pro duce a LOW at IC F pin 2 on the CPU board A LOl4 input at IC F pf 2 should produce a IIIGH at IC Mj...

Page 148: ...HIGH The LEDs corresponding to the address and data lines should light 0 If Corr ct Proceed to Table 4 5 If Incorrect If any of the address A A15 or data 07 lines fail to go HIGH check for shorts If t...

Page 149: ...and Hon the Interface problem lies in either one of board Pin 12 of IC Rl should be LOW and bus pin two areas the RUN STOP cir 58 should be HIGH If not check ICs Rand H cuitry or the SS Control cir ac...

Page 150: ...ponding to bus pfns 1 2 and 52 3 Turn p011er on and check for proper voltages on the bus as described on page 4 151 step 2 4 Pulling a board out whiie power is on usually damages the ICs connected to...

Page 151: ...eps below 1 Check ICs H K Bl and T on the Display Control board according to the tnstructfons on page 4 5 2 Turn power off and un solder one lead of R74 on the Display Control board Test for a resista...

Page 152: ...page 4 20 Step 6 If pulses are present at ICM pin 4 check IC E pin 1 on the CPU board for a con stant LOW signal If absent check continuity from pin 1 to Ground Check pfn 15 of ICE for a LOH PDBIN pu...

Page 153: ...U board If absent check for a HIGH PSYNC signal at pin 5 of JC F If absent trace continuity to ICM pfn 19 If conttnufty is present check JCs F and Maccording to the instructions on page 4 20 step 6 If...

Page 154: ...or a constant LOU level 0 If Correct If clear pulses are present on ICM the trouble lies in the SB circuitry Proceed to Step_B If present proceed to Step 2 If absent check pin 13 of IC A for a CS sign...

Page 155: ...sent proceed to Step E If present proceed to Step F 0 If Incorrect If absent trace co11tinuity to VRl pin 2 and repair as necessary Repair as necessary If absent refer to Section 4 3 Step 15 page 4 24...

Page 156: ...nd remove IC G Turn power on and check again for pulses at pins 8 9 11 or 12 If absent check IC P according to the instructions on page 4 5 Turn power off and reinstall IC G If any LOW levels are pres...

Page 157: ...proceed to Table 4 6 0 If Incorrect If pulses are absent at pin 3 trace contfnufty to pin 4 of IC G and repair as necessary If the pulse is absent at pin 4 of IC A turn power off and remove pin 4 from...

Page 158: ...logic operation produce a LO at pin 1 of IC Ml is present proceed to Table causing a LOW at pin 5 ALOW at 4 7 Ml pin 5 should produce a LOW at IC Rl pin 12 Trace this active tow FRDY level through th...

Page 159: ...s pressed and held IC Ml pin 11 on the Display Control board should go HIGH Check If HIGH signals and proper logic are present proceed to Step 2 0 If Incorrect If absent check for HIGH signals at pin...

Page 160: ...0 If Correct If present proceed to Step B If present proceed to Step_ C If proper operation is present proceed to Step 3 If Incorrect the instructions on page 4 5 If problems are suspected with IC Fo...

Page 161: ...d Pl pin 12 on the Display Control board Check for a LOH going pulse at pin 13 of IC Ml Note This pulse may be hard to detect If so hit the RUN swi tch to produce several of these pulses If Correct If...

Page 162: ...ed to Table 4 B If Incorrect If a HIGH l Oc signal 1s not present at pin 5 refer to Section 4 3 step 11 page 4 22 If HIGH going pulses are absent at pins 3 and 4 check for PSVNC and STSTB pulses at pi...

Page 163: ...posited follow the steps below Step l Instructions Pressing the PROTECT or UNPROTECT should produce a LOW at pfn 13 of IC Gl on the Dis play Control board as long as the switch is held Pressing the UN...

Page 164: ...2 Instructions ALOW on the PS line bus 69 should cause the PROT CT LED to 1ight 0 If Correct If so proceed to Table 4 9 on page 4 60 If Incorrect If the PROTECT LED does not lfght refer to Section 4...

Page 165: ...303 003 000 004 000 Note If this program cannot be deposited proceed to Table 11 on page 4 55 to correct the DEPOSIT problem Pin 12 of IC Jon th Interface board should be HIGH Pfn 13 of IC J should be...

Page 166: ...eed to Step 6 If Incorrect any suspected JCs according to the_ instructions on page 4 5 Check for HIGHs at pins 2 11 and 13 of IC K If absent trace continuity to VRl pin 2 on the CPU board and repair...

Page 167: ...d cause the corres ponding data line of ICs o E and Mon the CPU board to go HIGII If Correct If correct proceed to Step 9 If the proper data lines are HIGH proceed to Table 4 10 0 If Incorrect on page...

Page 168: ...ceed to Step 5 If the correct LEDs are lit proceed to Section 4 5 if problems exist with the EXAMINE EXAMINE NEXT DEPOSIT DEPOSIT NEXT ACCUMULATOR DISPLAY ACCUMULATOR LOAD or IN OUT switches If Incorr...

Page 169: ...ches Problems involving the RESET RUN STOP SINGLE STEP SLOW PROTECT UNPROTECT SENSE and STATUS switches should be checked before performing the tests in Section 4 5 Refer to Section 4 4 to solve probl...

Page 170: ...ressed RA7 RA4 pins 17 20 of IC G should be HIGII If Correct If RA7 RA4 go to the appro priate levels when the correspondinq switch is pressed proceed to Step 2 If Incorrect If RA7 RA4 are LOW when no...

Page 171: ...ch correspond to pins 8 and 11 respectively of IC P are never used Consequently when the DEPOSIT switch is pressed If address lfnes RA0 RA3 are operating properly proceed to Step 4 0 If Incorrect If t...

Page 172: ...lse level for each switch Switch Address Bit RA3 RA2 RAl RAO EXAMINE NP EXAMINE NEXT NP DEPOSIT NP DEPOSIT NEXT NP ACCUMULATOR DISPLAY p ACCIKJLATOR LOAD p IN p OUT p NP No pulses P Pulses p p p NP p...

Page 173: ...ponds to the number of SB pulses set in Table 2 If Correct If continuity is present proceed to Step 5 If correct proceed to Step 6 0 If Incorrect If continuity is absent check for opens or a bad conne...

Page 174: ...ress as sh own in Table 3 2 should appear on 1ines RA0 RA7 and remain there until the switch 0 If Correct_ If these signals are func tioning property proceed to Step 7 If constant levels are not prese...

Page 175: ...S3 S4 S5 S7 S8 The S pulses listed in Step I 10 should produce the following results A For l ach A0 A7 switch that is up S1 should produce a HIGH pulse on the corres ponding output pfn of ICE If Corr...

Page 176: ...E If HIGH pulses are present proceed to Step F If Incorrect to the input pins of ICs E and Mon the Interface board with the corresponding s11ftcti up Repair as necessary Check logic operation from he...

Page 177: ...H If not trace continuity to Vee If the ifEP pulse fs still absent check IC J according to the fnstructfons on page 4 5 If IC J fs working properly and if contfnufty is present check ICs Aand Hon the...

Page 178: ...on the Interface board according to the instructions on page 4 5 S7 should produce a LOW pulse at pin 12 of IC 8 causing a HIGH pulse at pin 1 of IC 8 If a HIGH pulse is not present at pin 1 check IC...

Page 179: ...efer to Step 13 on page 4 23 trace logic from pin 12 of IC J to a HIGH pulse on pin 11 of IC Ml Check any suspected ICs according to the instructions on page 4 5 Pfos 12 and 10 of IC Ml should be HIGI...

Page 180: ...to Step 16 If Incorrect If the symptoms change when A8 A15 are lowered check the logic operation of ICs w u z Al a d A If necessary check the ICs according to the instructions on page 4 5 If the symp...

Page 181: ...i e c _lt1UL T9l ii DISPI Al J f 1 1 1 nO J fuhc 1o i follow tM itep below _f If Correct_ 1 1 Chec k the ground S trap Proceed to Step 2 from VRl on the Display Control board to the computer it must b...

Page 182: ..._ i 11 j _ r 4 5 i r ft _t i i l ill A 11 I I I 1 I I 0 If Correct Proceed to Step 3 Proceed to Step 4 Proceed to Step 5 Proceed to Step B I If Inco rect Repair if necessary If pins 2 and 1 are HIGH t...

Page 183: ...4 9 starting on page4 50 D If the OUT swf tch wi 11 not functiofl check the sense swUc h operat fon as shown fn Table 4 9 starting on age 4 50 If Corr ect 0 If Incorrect Note Jumper Jt to JF on the Di...

Page 184: ...C SECTION V C ASSEMBLY 0...

Page 185: ...0 0 0...

Page 186: ...ing It is essential that you use the correct type of soldering iron A 25 30 watt iron with a chisel tip such as an Ungar 776 with a 7155 tip is recommended in the assembly hints booklet SECTION V ASSE...

Page 187: ...rovided throughout the manual to assist you 1 Boxed off parts identifi cation lists with spaces provided to check off the components as they are installed 2 reproductions of the silkscreens showing pr...

Page 188: ...hing 11 bridges 11 or etching opens in the printed circuit lands as shown in the drawings below Example of an J 6 Etching Bridge i f ts w w This could also appear as a hairline cut A thorough visual i...

Page 189: ...0 0...

Page 190: ...install components may cause pennanent damage to the component or the rest of the unit it will definitely void your warranty More specific instructions or procedures of a less general nature will be i...

Page 191: ...tolerance Use this process to choose the correct resistor called or in the manllJ ll RESISTOR COLOR CODES ICOLOR BANDS 3rd BAND 1 2 Multiplier I I I jBlack I 0 1 j Brown 1 I 102 i IRed 2 10 iOrange 3...

Page 192: ...d the two leads slightly outward Sol der the leads to the foil bot tom side of the board and clip off any excess lead lengths B Epoxy Dipped Tantalum Epoxy Dipped Ceramic and Ceramic Disk Capacitors P...

Page 193: ...o11 Instr uctinnn To install transistors use the fol lowing instructions NOTE Always check the part number of each transistor before you install it See listing of Transistor Part Numbers for each boar...

Page 194: ...N THE CIRCUIT BOARD WITH THE CORRECT DESIGNA TION FOR EACH OF THE THREE LEADS USE THIS INFORMATION TOGETHER WITH THE INFORMATION IN THE ASSEMBLY MANUAL FOR THE CORRECT ORIENTATION OF THE TRANSISTORS A...

Page 195: ...mall screwdriver may be used to help guide the pins into place When the tips of all the pins have been started into their holes push the IC into the board the rest of the way Tape the IC to the board...

Page 196: ...eration 2 When handling the IC develop the habit of first touching the conduc tive container in which it is stor ed before touching the IC itself 3 If the IC has to be moved from one contajner to anot...

Page 197: ...IT BOARDS REFER TO THE ABOVE DRAWING TO LOCATE PIN 1 OF THE re s THEN USE THIS INFORMATION IN CONJUNCTION WITH THE INFORMATION BELOW TO PROPERLY ORIENT EACH IC FOR INSTALLATION Page 5 12 WARNING INCOR...

Page 198: ...lled with a 24 pin socket according to the IC Installation Instructions Section B pag e 5 10 The chart below lists the 22 ICs their corresponding part numbers and acceptable part substitutions IC Part...

Page 199: ...terface Card according to the Resistor Installation Instructions given on page 5 6 NOTE Save the excess resistor leads for use in Paragraph 5 15 1e ti s V 0 a a Resistor Values f J Rl through R7 o 1 w...

Page 200: ...pressor capacitors NOTE O 1uf 12V or O luf 16V Save the clipped off capa citor leads for use as jumper wires in Paragraph 5 14 5 13 CAPACITOR INSTALLATION Figure 5 4 Install the two electrolytic capa...

Page 201: ...5 16 L IIJE JF V 5 15 F RRITE 8E l0 INSTALU TION Figure 5 6 Install the three ferrite beads Ll through L3 Bag 3 according to the following instructions 1 Using the resistor leads saved from Paragraph...

Page 202: ...a 6 lockwasher and a 6 32 nut 4 Solder the three leads to the foil bottom side of the card Be sure not to leave any solder bridges leads with their designated holes 5 Clip off any excess lead lengths...

Page 203: ...ignated holes on the silk screened side of the card P3 F l l t t t l l lJ _ Ai 3 Sol_der each pin to the foil bottom side of the card Et sure not to leave any solder bridges 4 Clip off any excess 1ead...

Page 204: ...Figure 5 9 so that the socket end of the plug hangs over the left side of the card C Ribbon Cable 2 Insert the pins into their pro per holes and solder each pin to the foil bottom side of the card Be...

Page 205: ...0 0...

Page 206: ...on the Display Control Board Install these sockets and ICs according to the Integrated Circuit Installation Instructions Section B given on page 5 10 Silkscreen IC Part Socket Designation Number Size...

Page 207: ...uctions Section A given on page 5 10 IC Part Numbers i I I i B D E F H K M 7407 j U W Y Vl Zl Cl Nl Fl Ul Gl Wl Hl Yl L1 Ml Kl R S p Pl Z C Jl El Rl Al J V 01 Tl Xl N L X 7405 or 74LS05 74LS175 74LS74...

Page 208: ...line on the silkscreen below NOTE Save any excess resistor leads for jumper connec tions in Paragraph 5 24 and for ferrite bead in stallation in Paragraph 5 28 Resistor Values R2 Rl9 R21 R22 R24 R26 R...

Page 209: ...n Figure 5 13 l The resistor pack has a small dot printed at one end This dot must correspond with the dot printed on the PC Board Insert the resistor pack per pendicular to the silk screened side of...

Page 210: ...y be inser ted into the left most hole marked with a small dot Solder the two inserted leads to the foil bottom side of the board 3 Insert the remaining four re sistors vertically into the designated...

Page 211: ...be installed on the Display Control Board Use the resistor leads saved from Paragraph 5 22 as jumper wires Cut two leads to 1 inch lengths and jumper the following pads on the Display Cont ol Board D...

Page 212: ...designations Note that there is not enough space between Pl and Rl Rl and Ul and Ul and Vl for the suppressor cap acitors to fit on the top of the board These three capacitors will therefore be instal...

Page 213: ...tantalum capa citor Cl C3 CS CS C7 ClO and Cll BagS are ceramic disk capa citors They need no polarity ori entation Install the dipped tant alum capacitors and the ceramic disk c pacitprs a_ccordtng...

Page 214: ...cording to the fol lowing instructions Ci Using the resistor leads saved from Paragraph 5 22 cut three 1 inch lead lengths 0 2 3 Insert the lead through the bead and bend the ends of the lead to confo...

Page 215: ...ree leads at a right angle to confonn to its proper hole on the board 6 32 X 1 411 r Screw I l MC7805 3 Referrinq to Fiqure 5 19 set the reg 1ator in place on the silk screened side of the board Secur...

Page 216: ...g to the following instruc tions NOTE Set aside 25 of the nuts provided with the switches The rest of the hardware associated with the switches will not be used o O 0 0 8 sss 1 I I I I 1 With the notc...

Page 217: ...itches and the Display Control Board the alignment on the final display will not be straight 4 After all of the switches have been installed remove the nuts from the switches and set aside for use in...

Page 218: ...e LEDs and the Sub Panel according to the following instructions 1 Place two of the nuts saved from Paragraph 5 30 over each of the following switches SAO S9 Sl SA15 SS as shown in Figure 5 21 Thread...

Page 219: ...5 238 NOTE Do not solder the LED leads at this time 3 Place the Sub Panel over the Display Control Panel and tape together as shown in Figure 5 24 Display Control Sub Panel RL 21 n CATHOOE 11 A CATHO...

Page 220: ...eath so C that the switches are not rest ing on the work surface 0 WARNING LEDs are heat sensitive Use a minimum amount of heat for a minimum length of time when soldering them Be sure not to leave an...

Page 221: ...0 0 0...

Page 222: ...t this time In stallation instructions for these ICs are given in Paragraph 5 43 The following chart lists each integrated circuit its part number and acceptable substi tutions IC Part Numbers f D E 8...

Page 223: ...39 R43 RSO 2 2K ohm red red red 1 2W or 1 4W r Rl R2 RS R26 R27 R37 R38 R44 R49 3 3K ohm orange orange red 1 2W or 1 4W t R9 t Rl 6 f R34 i Rl 0 f R21 R23 j Rl 7 xJ R22 r Rl 5 Page 5 38 15K ohm brown...

Page 224: ...blue side to the 11 11 sign on the silkscreen before installing each capacitor The remaining suppressor capacitors are ceramic disk capacitors Bag 5 They need no polarity orientation Insta11 both type...

Page 225: ...E When installing the dipped tantalum and the electro lytic capacitors be sure the positive lead is in stalled in the hole on the silkscreen Capacitor Values Cl CS C6 Cll 33uf 16V electrolytic 0 C2 22...

Page 226: ...Install the two diodes Dl and D2 Bag 4 on the CPU Board according to the Diode Installation Instruc tions given on page 5 8 Diode Part Numbers E f I Dl y D2 J I U llllt R16 Rl7 c n 01 Rl5 1N4730 1N47...

Page 227: ...lead lengths 2 Insert the lead through the bead and bend the ends so they conform to the desig nated holes on the CPU Board 3 Insert the leads into the board and solder to the foil bottom side of the...

Page 228: ...the board 3 NOTE Use heat sink grease when installing this component Apply the grease to all metal surfaces which come in contact with each other Referring to Figure 5 32 set the regulator and heat s...

Page 229: ...e connector as shown in Figure 5 33 with the bent pins pointing toward the top of the board I I 2 Insert the short pins into the 10 designated holes on the silk screened side of the board 3 Solder eac...

Page 230: ...embly Procedure Erratum Page 5 44 MALE CONNECTOR INSTALLATION Kit builder may find that the 10 pin Male Connector may already be installed on the CPU Board If it has been installed ignore the installa...

Page 231: ...0 0...

Page 232: ...bend each lead at a right angle to conform to its respective hole on the board Insert the leads so that the crystal is resting flat on the board on the square labelled XTAL 3 Solder the two leads to...

Page 233: ...5 10 IC A should be installed without a socket according to the IC Installation Instructions Section A on page 5 10 WARNING ICs Aand Mare MOS static sensitive ICs See the MOS IC Special Handling Preca...

Page 234: ...llation Instructions given on page 5 7 Capacitor Values x Cl through C4 2200uf 25V electrolytic 5 46 RESISTOR INSTALLATION Figure 5 36 Install the 2 resistors Rl and R2 Bag 1 on the Power Supply Board...

Page 235: ...Install the 2 diodes Dl and D2 Gaq J on the Power Supply Board according to the Diode Installation Instructions given on page 5 8 I RI 01 Diode Part Numbers v x Dl and 02 IN4746 I _j 5 37 Power Suppl...

Page 236: ...either two 6 32 x 3 811 nylon screws Bag 5 or two 4 40 x 3 811 metal screws Bag 5 to be used when installing transistors Ql and ij2 If your kit contains metal screws two fiber shoulder washers Bag 5 m...

Page 237: ...tach the heat sink to the b idge re tifier using 6 32 x 1 2 screw and a 6 hex nut Bag 5 3 Orient the heat sink and recti fier assembly correctly over the board as shown in Figure 5 39 When you have th...

Page 238: ...rting nine 6 32 x 9 16 or 6 32 x 5 8 screws nine 6 1ockwashers and nine 6 nuts Bag 5 into the proper holes as shown in Figure 5 41 4 l _ Insert 1 shorting 1ink Bag 2 over the lower portion of terminal...

Page 239: ...spacer on each screw and tighten it down 3 Rest the board on the Cross Member so that the spacers are aligned with the mount ing holes 6 32 x_3 8 screw _ p 3 411 threaded spacer Page 5 o2 4 F 1sten th...

Page 240: ...ps using a 6 32 x 3 8 screw and a 6 32 nut Bag 5 Install the capacitor s according to the following instructions l Secure the capacitor in the clamp with a 6 32 x 3 8 screw and orient the capa citor a...

Page 241: ...e and Fuse Holder AC Power Cord Trans former Back Panel Mounting Before beginning the back panel assembly remove the back panel from the mainframe and remove the mainframe from the case bottom Set asi...

Page 242: ...the wiring of the back panel The sizes are shown in Figure 5 47 Refer to this figure whenever a terminal end size is called out in the assembly instruc tions SIZE BAG _ TERMINAL END A 2 I D B 2 Os C...

Page 243: ...oldering to prevent solder flowing onto the s1io o n tabs F or tenninal end size E Size E termi na1 ends do not have insulators and therefore must be insulated with heat shrink tubing The procedure fo...

Page 244: ...e center portion of the pin or socket to the exposed portion of the wire 3 O Insert the pins and sockets into their respective housings as shown in Figure 5 49B Connector Pin Commoning Tab 4 Gammoning...

Page 245: ...1 1 lil l l l l I I I 8 42 1 i 43 I 46 I I 47 44 I 45 48 49 I GNO GND I __ l 0 av 18vO __ __ 1 18 lave Iv 8v _ MOTHER BD I Figure 5 50 Wiring Diagram 25 IREOl 26 BLUE 27 GRNI 2h IBLKI 29 R 8 1 30 8 BL...

Page 246: ...ground side of the capacitor to termtnal 8 of the terminal block TBl See wiring dia gram Figure 5 50 Wiring For Two Capacitors l Jumper the two 11 11 terminals to each other and the two ground termina...

Page 247: ...upper right corner 2 Cut two 4 inch lengths of 12 10 gauge wire and two 19 inch lengths of 12 10 gauge wire J Attach an A size terminal end to one end of each wire Attach a Dsize terminal end to the o...

Page 248: ...of 22 18 gauge wire to the ter minals 2 Attach connector s0 CKE ts Para graph 5 58 to the two wire ends The wire ends on the plug have been stripped and pre tinned Label the wires 33 C and 34 3 Mount...

Page 249: ...ER CORD Figure 5 54 _ 1 2 3 4 Strip about 7 inches of casing off the end of the power cord to expose the three wires in side Put the strain relief Bag 2 on the cord and position it as shown in Figure...

Page 250: ...es and label the wires 16 17 18 19 beginnin9 with the top wire Figure 5 56 3 Attach a C size terminal end to each of the three remaining secondary wires Figure 5 56 Label the two yellow wires 20 and 2...

Page 251: ...primary transformer wires v 2 When all eight wires on the primary side of the transformer have pins attached insert the pin housing P4 as shown in Figure 5 58 Insert the pins in the following order se...

Page 252: ...ns 3 and 5 7 and 9 4 and 6 8 and 10 Make sure the tabs do not come in contact with each other 3 The two wires from the fan 33 and 34 are to be inserted into slots 1 and 2 of the P4 pin housing Pin Hou...

Page 253: ...10 32 X 1 2 Screw 10 Lockwasher 5 67 Mount Transformer to Back 2 Panel Mount the trans former to the back panel as shown in Figure 5 59 using four 10 32 x l 2 inch screws 4 nuts 4 flat washers and fo...

Page 254: ...or s Connect wire 12 from the bridge rectifier to the ground side of the capacitor s Make contin uity checks see wiring diagram Figure 5 50 Original Back Panel Mounting Screws L 0 NOTE Make sure the w...

Page 255: ...0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 ToTBI to slot 3 to slot 9 to slot 10 8v ground 18v o o 0 0 0 0 l 0 0 0 0 P 0 6 32 screws 4 40x screws 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Figure 5 61 Motherboard Wire Conn...

Page 256: ...the wire from the top side of the motherboard and soldering it to the foil bottom side On the foil side of the motherboard hole 1 and hole 50 are marked on each side Complete the wire connec tions acc...

Page 257: ...attern on the bottom of the board 2 Visually inspect the connection to make sure there are no sol der bridges 3 Remove the two cross rails from the mainframe Mount the cross rails to the bottom of the...

Page 258: ...is completely filled with solder Ground Land Solder Lug On both sides of the motherboard 3 Place the braid on the ground land along side the cross rail so that the lug and about three inches of braid...

Page 259: ...s on the bus wires to the terminal block TBl on the Power Supply Board as follows see wiring diagram Figure 5 50 Check for conti nu1 t v between each bus connection and its respective terminal block c...

Page 260: ...ottom side of the Display Control Board Solder the other wire wire 38 to the bottom pin of Sl C Attach a connector pin to the free end of both wires Insert the connector pins into the 2 pin pin housin...

Page 261: ...into the fuse holder plug in the power cord and turn Sl on Monitor the voltages on the motherboard If the voltages are not correct refer to Section IV Troubleshooting Disconnect power before proceedi...

Page 262: ...wire into place as shown in Figure 5 65 Aand B Then solder the exposed portion of the wire to the pin Insert the 8 pins into connector slots 3 through 10 on both con nectors as shown in Figure 5 65 C...

Page 263: ...into the case bottom at a front to back angle so the switches on the Display Control Board fit through the holes on the dress panel 3 Secure the mainframe in place on both sides by replacing the two...

Page 264: ...C C 0 appendix A parts list...

Page 265: ...Circuit 101024 l 8212 Integrated Circuit 101071 1 7805 Voltage Regulator 101074 1 24 pin Socket 102105 2 24 1 uf 12v Capacitor 100348 2 33 uf 16v Capacitor _100326 c3 2 Molex Key l01791 3 Ferrite Bead...

Page 266: ...Quantity Component MITS Stock Number 4 1 100 pin Edge Connector 101864 2 Card Guides 101714 2 Ribbon Cable Assembly 34 Conductor 103038 4 1411 Green or Blue Wire 103051 or 103052 5 7 2 2K l 2w 5 Resis...

Page 267: ...Circuit 101020 4 74LS04 Integrated Circuit 101042 1 74LS14 Integrated Circuit 101123 3 7410 Integrated Circuit 101024 1 74Ll0 Integrated Circuit 101081 2 74LS30 Integrated Circuit 101135 2 4040 Integr...

Page 268: ...4 34 2 2K Ohm 1 2w 5 Resistor 101945 5 3 OOluf lkv Capacitor 100328 1 luf sov capacitor 100380 2 47 uf 16v Capacitor 100392 2 22 uf 35v Capacitor 100393 6 25 luf 12v Capacitor 100348 C 7 17 SPDT STI 1...

Page 269: ...ted Circuit 101045 2 74LS14 Integrated Circuit 101123 1 74LS13 Integrated Circuit 101124 i 1 2 74LS04 Integrated Circuit 101042 l l 7805 Voltage Regulator 101074 JI ii l 7812 Voltage Regulator 101085...

Page 270: ...33uf 16v C pacitor 100326 2 lOuf 25v Capacitor 100352 1 lOuf 16v Capacitor 100394 1 22uf 16v Capacitor 100395 C 7 1 Small 10 pin Right Angle Connector 101798 1 100 pin Edge Connector 101864 2 Card Gu...

Page 271: ...al Block 141 Series 10 Term Jumper for 141 Series Fuse 3 amp SLO BLOW Fuse Holder T B Brackets 100733 102819 102820 100726 1Ql998 101870 101627 101868 101651 101772 101813 101652 1 Strain Relief 10171...

Page 272: ...rew 8 32 x 1 Screw 10 32 x 1 211 Screw 6 32 x 1 4 Screw 6 32 Nut 6 Snap On Nut with fan 8 32 Nut 10 32 Nut _6 32 x 3 8 Screw Nylon 6 32 Nut _ Nylon 6 Lockwasher 8 Lockwasher 10 Lockwasher 3 411 6 32 S...

Page 273: ...Continued Component MITS Stock Number O 95000uf 15v DC with Clamp 100391 PC Board 100202 6Ft 3 wire Power Cord 101742 I Fan 101869 18 Stranded Wire 103090 12 Stranded Wire 103092 Grn Braid 101801 r 3...

Page 274: ...and Misc Component Case Back Panel Dress Panel Main Board Card Rail Manual Altair 8800b Documentation Micro Processor Dictionaey and Guide Intel 8080 Manual MlTS Stock Number 100505 100545 100511 1 l...

Page 275: ...76 page 9 C 17 Page 3 63 Figure 3 14 CPU Schematic o i An output pin at IC A is labelled incorrectly as pin 7 CHANGE TO From the 8080 the 1 signal enters NANO gate Aat pin 7 and passes from pin 6 of I...

Page 276: ...i ie termina1 ends on o b 1dge rect tffe r t frral s as shown in Figure t51 Attach ifie twcf 5 nch w r i _ _ _ ty t r 11 Page J 63 s cond ry Wiring Steps 1 2 aod 4 h r _ r_ _ _ _ _ _ ______ f t _ h O...

Page 277: ...43 2 2K R42 2 2K R29 2 2K I I 01 L2 02bE F 1 J v I rtE 19 I 5 s rse U m 0 0 a a A4 RESET AS fl I I I I I I 92 X RESET r 2 A6 A7 34 AB sl A9 jAIO All Al2 Al3 Al4 MJ AIS READY 8 REAIJ I ID2TTL R9 RYDIN...

Page 278: ...10 0 4 3 B8 I t 008 I 3 18 ooi I II p 10 3 B8 1 13B ol2 I 007 3 B8 Bl li 24 2B HL Ill 8 INVERTERS P2 __ 2i 005 L A7 5 C8 2 74LS04 OR 74LS14 16 INVERTERS 2 p I 4 p 5 p 9 8 p aw 4 I _2 i 8 w II w 12 l o...

Page 279: ...3 UNPROT 2 D2 S IN_T_A z r M IO 3 A 4 I 19 I SWO 1 3 A4 18 I c A 98 48 SHL s I SSTACK 1 3 A4 I _ ________ t i t ti____ S H L TAJ 1 3 A4 L 415 L 9 I 17 I I I I 6 1 so iiT 3 A3 _ 1 14 I I 1 5 I 1 21 j 1...

Page 280: ...74LS10 7 4 LS00 I 74LS14 14 7 I A 74LS04 8 JD_JC I 7420 14 7 SINP 3 4 2 C9 C _ J I 8212 24 12 SOUT 9 2 C9 I I I SSWI PWR 2 C 9 2 D9 II 1 p I STB 1 II I A 2 DOT U 22d l 2 1 LDT A 2 I I I 12 I B A 2 D06...

Page 281: ...Mn 13 12 Al2 _ 2 0 8 S3 I Et U 2 II 10 9 8 7 6 5 4 I 6 5 II 4 12 3 2 I 13 2 I II 10 Al3 _ FDl5 1 f 2 0 8 U __ 1 g RA7 I D n st CII 6 N 74L30 OR I 9 8 Al4 FDI6 2 DB 17 0 O O O O O O Y 2 05 c o c C a O...

Page 282: ...1 I IV AA __ 1 2 J D4 Q II II D 4 Q 115 IV 4 RA 4 I_ 8 9 R81 9 9 RAIS 2K CK CK 7405 1 19 C C I I 7405 74LS175 74LS175 9 I Oe tVll X 1 Q _a 5 7 IL t VV l 4 0 DI Q DI Q 1 4 7430 OR 74LS30 OR 74Lll0 RAS...

Page 283: ...J I A4 3 r 4 R 3 7 II r 1 11 l t A_____ I I A3 u l 1 A4 J 1A3 I 2 R N 39 I A2 10 I 211 1 IA2 13 6 ol2 R M N 1 A4 I I I 19 I I iio 1 B 6 A9 I B 6 Ai 1 B 6 n ca A6 I C 6 ii I C 6 A4 ca A3 ca A2 ca Al 1...

Page 284: ...1 e D03 1 13 r 4 DO f r 4 005 wt c Do r I i V co e9 c MA oo f is8L el r 5V I 1t1 DI I 1 r 1 2 t n c I 0 2 isfJ rlr II f D l 2 B zc O t 02 02 z c o i s F t C3 1 r 1 F 2 DT i g 1 to r IC r ILl m s I R2J...

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