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Installation and Settings

UG0786 User Guide Revision 1.0

7

3

Installation and Settings

This section provides information about the software and hardware settings required to run the 
pre-programmed demo design on the PolarFire Splash Board.

3.1

Software Settings

Download and install the latest release of Microsemi Libero

®

 SoC PolarFire software from the Microsemi 

website, and register for a free one-year Gold License to the Libero software. The Libero SoC PolarFire 
installer includes FlashPro5 drivers. For instructions about installing Libero SoC PolarFire and 
SoftConsole, see the 

Libero Software Installation and Licensing Guide

. For instructions about how to 

download and install Microsemi DirectCores and driver firmware cores on the PC where Libero SoC is 
installed, see the 

Installing IP Cores and Drivers User’s Guide

.

3.2

Hardware Settings

This section provides information about jumper settings, switches, LEDs, and DIP switches on the 
PolarFire Splash Board.

3.2.1

Jumper Settings

Connect the jumpers according to the settings specified in the following table.

Table 3 • 

Jumper Settings

Jumper

Description

Pin

Default Setting

J5, J6, J7, 
J8, and J9

Jumpers to select the 
PolarFire JTAG or A2F 
JTAG

Close pin 1 and 2 for programming the power sequence 
and monitoring chip through the FTDI.

Close pin 2 and 3 for programming the PolarFire FPGA 
through FTDI.

Always retain the default jumper setting.

Open

Closed

J11

Jumper to select the 
external JTAG or the 
on-board FTDI chip for 
programming the 
PolarFire device

Close pin 1 and 2 for programming through the FTDI chip.

Open pin 1 and 2 for programming through an external 
FlashPro4 or FlashPro5 device.

Closed

J10 

Jumper to select 
between FTDI chip or 
external SPI Flash to 
program the device

Close pin 1 and 2 for programming through the external 
SPI flash.

If J10 is open, it allows SPI slave programming using the 
FTDI chip. However, this feature is not available in 
PolarFire devices yet. It is expected to be supported in 
future releases.

Open

J3

Jumper to select the 
core voltage

Close pin 1 and 2 for 1.05 V.

Open pin 1 and 2 for 1.0 V.

Open

J4

Jumper to select the 
on-board slide switch 
or remote power 
ON/OFF

Close pin 1 and 2 for manual power switching using SW1.

Close pin 2 and 3 for remote power switching using the 
GPIO capability of the A2F200M3F-1FGG256I chip.

Closed

Open

Summary of Contents for UG0786

Page 1: ...UG0786 User Guide PolarFire FPGA Splash Kit...

Page 2: ...e suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associated with such in...

Page 3: ...d Components and Operations 10 4 1 DDR4 Memory Interface 10 4 2 SPI Serial Flash 10 4 3 Transceivers 11 4 3 1 XCVR0 Interface 11 4 3 2 XCVR1 Interface 12 4 3 3 Transceiver Reference Clocks 12 4 4 Micr...

Page 4: ...1 0 iv 9 1 Prerequisites for Installing PowerMonitor 26 9 2 Installing PowerMonitor 27 9 3 About Microsemi PowerMonitor GUI 27 10 Appendix Errata 29 10 1 Hot swapping not supported on programming hea...

Page 5: ...R1 Interface 12 Figure 8 Transceiver Reference Clocks 12 Figure 9 PHY Interface 13 Figure 10 Power Management 14 Figure 11 FTDI Interface 15 Figure 12 Reset Circuit 15 Figure 13 50 MHz Clock Oscillato...

Page 6: ...t Contents 2 Table 2 PolarFire Splash Board Components 4 Table 3 Jumper Settings 7 Table 4 Power Supply LEDs 8 Table 5 I O Voltage Rails 8 Table 6 User LEDs 16 Table 7 Push Button Switches 16 Table 8...

Page 7: ...1 Revision History The revision history describes the changes that were implemented in the document The changes are listed by revision starting with the most current publication 1 1 Revision 1 0 Revis...

Page 8: ...rogrammed using the on board FlashPro5 programmer The on board FlashPro5 programmer is used to develop and debug embedded applications using SoftConsole Identify or SmartDebug 2 1 Kit Contents The fol...

Page 9: ...a 48 bit accumulator and an optional 16 deep 18 coefficient RO Built in PROM modifiable at program time and readable at run time for user data storage Digest integrity check for FPGA PROM and sNVM Lo...

Page 10: ...r with four lanes One SPI flash device The PolarFire Splash Board has 12 layers all of which are made of the Nelco 13 dielectric material The following illustration highlights various components of th...

Page 11: ...oftware Communication Interfaces x4 PCIe edge connector CON1 PCIe edge connector with four XCVR0 lanes One 10 100 1000 Ethernet RJ45 connector J14 Ethernet RJ45 jack with external magnetics interfacin...

Page 12: ...ment portal doc_view 126483 esd appnote Power down the board to switch between programming headers J17 and PCIe CONN CON1 2 6 Operating Temperature A future version of this document will have informat...

Page 13: ...le Table 3 Jumper Settings Jumper Description Pin Default Setting J5 J6 J7 J8 and J9 Jumpers to select the PolarFire JTAG or A2F JTAG Close pin 1 and 2 for programming the power sequence and monitorin...

Page 14: ...owing table lists the key power supplies required for normal operation of the PolarFire Splash Board J32 Jumper to select the PolarFire VCCIO voltage VCCIO_LPC_VADJ to 1 2V 1 5V 1 8V 2 5V or 3 3V Clos...

Page 15: ...and 1 0 V available on the PolarFire Splash Board Figure 3 Voltage Rails on PolarFire Splash Board 9 DWH 9 92B 1 5 B 9 9 9 3026 6ZLWFK DWH 3026 6ZLWFK DWH 0DLQ 21 2 6ZLWFK 0 9 WR 9 5 0753 9 9 0 5 9 2B...

Page 16: ...onnected in fly by topology Density 1 GB Data rate DDR4 32 bit at 200 MHz clock rate The DDR4 memory operates at 1600 MHz with gearing 1 8 for the 200 MHz PolarFire fabric The PolarFire Splash Board d...

Page 17: ...our lanes connected as follows Lanes 0 1 2 and 3 are directly routed to the PCIe connector TX pad trace AC coupling trace via to bottom layer trace PCIe connector pad RX pad trace via to top layer tra...

Page 18: ...s the XCVR1 interface of the PolarFire Splash Board Figure 7 XCVR1 Interface 4 3 3 Transceiver Reference Clocks The transceiver supports reference clocks connected as follows XCVR 1A reference clock i...

Page 19: ...he MDIO MDC interface The device includes Microsemi EcoEthernet 2 0 technology with energy efficient Ethernet and other power saving features that reduce power based on link state and cable reach Thes...

Page 20: ...ng USB 2 0 high speed 480 Mbps and full speed 12 Mbps compatibility Two multi protocol synchronous serial engines MPSSE on channel A and channel B to simplify synchronous serial protocol USB to JTAG I...

Page 21: ...of 50 ppm is available on the board This clock oscillator is connected to the FPGA fabric to provide a system reference clock An on chip PolarFire phase locked loop PLL can be configured to generate a...

Page 22: ...on tactile switches that are connected to the PolarFire device The following table lists the on board push button switches Table 6 User LEDs PolarFire Splash Board Ref Des PolarFire FPGA Pin Number Po...

Page 23: ...ON or OFF using a 12 V external DC jack 4 9 4 DIP Switches SPST The SW11 DIP switch has four connections to the PolarFire device The following table lists the on board DIP switches Table 8 DIP Switch...

Page 24: ...ls are routed to the FMC connector J17 for application development The following table provides the J17 FMC pinout details Table 9 J17 FMC Connector Pinout FMC Pin Number J17 FMC Net Name PolarFire Pi...

Page 25: ...DQS CCC_SW_PLL1_OUT0 D24 LPC_LA23_N B1 GPIO246NB2 DQS D26 LPC_LA26_P F5 GPIO250PB2 D27 LPC_LA26_N E5 GPIO250NB2 G2 LPC_CLK1_M2C_P A15 GPIO29PB2 CLKIN_S_9 CCC_SE_CLKIN_ S_9 G3 LPC_CLK1_M2C_N A16 GPIO2...

Page 26: ...2 H13 LPC_LA07_P H15 GPIO31PB2 H14 LPC_LA07_N G15 GPIO31NB2 H16 LPC_LA11_P B2 GPIO249PB2 CLKIN_S_3 CCC_SW_CLKI N_S_3 H17 LPC_LA11_N B3 GPIO249NB2 H19 LPC_LA15_P D14 GPIO24PB2 H20 LPC_LA15_N E14 GPIO24...

Page 27: ...Pin List UG0786 User Guide Revision 1 0 21 5 Pin List For information about all package pins on the PolarFire device see Package Pin Assignment Table...

Page 28: ...R131 R130 R128 R129 C55 R48 R54 R53 R49 C48 R42 U4 R195 C105 C122 C119 R125 Y2 J12 U9 Y3 C102 C103 C71 R121 R101 R81 R82 C62 U16 J10 C58 R63 SW2 R23 R30 R29 R15 J33 J31 C100 C112 C63 Q3 P7_F2 Q1 J3 R2...

Page 29: ...R377 C228 C232 R266 R267 R251 C165 C135 CON1 R381 C477 C478 C468 C451 C440 C368 C359 C345 C337 C323 C326 C336 C322 C298 R265 R279 C183 C168 C159 C152 C161 C166 C148 C133 R417 C509 C499 C467 C474 C485...

Page 30: ...o Design UG0786 User Guide Revision 1 0 24 7 Demo Design For information about how to run the JESD204B standalone demo design see DG0796 PolarFire FPGA Splash Kit JESD204B Standalone Interface Demo Gu...

Page 31: ...switch When the board is successfully set up the LEDs start glowing 4 On the host PC start the FlashPro software 5 Click New Project to create a new project 6 In the New Project window do the followi...

Page 32: ...he board when pins 2 and 3 of the J4 jumper are closed Powers down the board if voltage threshold violations are observed on a power rail The analog computing engine block in the SmartFusion device is...

Page 33: ...p exe file 3 Follow the instructions displayed in the installation wizard After successful installation PowerMonitor appears in the Start menu of the host PC 4 Click Start and then click PowerMonitor...

Page 34: ...ter staring the PowerMonitor GUI the voltage plot takes minimum five seconds to plot the samples Note For more information about the recommended minimum and maximum operating voltage of each rail see...

Page 35: ...a This section contains information about known issues specific to the PolarFire Splash Board 10 1 Hot swapping not supported on programming headers and PCIe connector Hot swapping is not supported on...

Page 36: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Microsemi MPF300 SPLASH KIT ES...

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