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Microsemi SmartFusion UG0209, User Manual

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Microsemi SmartFusion UG0209 User Manual Download Page 21

Component Descriptions and Connections

UG0209 User Guide Revision 7.1

14

waveforms can be displayed through the mixed signal header. In addition, one PWM RC circuit source is 
routed to the AV input pin of an analog quad. This AV pin can be used to monitor the generated voltage 
with high accuracy, depending on the ADC resolution configured in the FPGA.

Figure 6 • 

PWM Pins

The following figure shows the A2F200 pins driving PWM and the PWM circuit.

Figure 7 • 

PWM Circuit

5.4

Push-Button System Reset

A push-button system reset switch with a schmitt trigger is provided on the board, as shown in the 
following figure. The Schmitt trigger reduces noise on the system reset push-button. The SmartFusion 
MSS reset is synchronized with this reset.

Figure 8 • 

Push-Button System Reset

F2-200-IO_0

DACOUT1

F2-200-IO_1

F2-200-IO_2

DACOUT0

PWM0

F2-200-IO_8

PWM1

F2-200-IO_3
F2-200-IO_5

MSS_GP_IO_14

MSS_GP_IO_15

F2-200-IO_6
F2-200-IO_7

F2-200-IO_4

F2-200-14-MSSIO

25

F2-200-0-FPGAIO

27

F2-200-1-FPGAIO

29

DGND6

31

F2-200-4-FPGAIO

33

F2-200-6-FPGAIO

35

F2-200-7-FPGAIO

37

F2-200 PWM0

39

DGND8

41

AGND1

43

OBD0

45

AGND3

47

F2-200-15-MSSIO

26

DGND5

28

F2-200-2-FPGAIO

30

F2-200-3-FPGAIO

32

F2-200-5-FPGAIO

34

DGND7

36

F2-200-8-FPGAIO

38

F2-200 PWM1

40

DGND9

42

AGND2

44

OBD1

46

AGND4

48

F2-200-PWM1

F2-200-PWM0

PWM0

PWM1

R316

4K7-00603

R316

4K7-00603

R314

4K7-00603

R314

4K7-00603

R281

100K-0603

R281

100K-0603

C283 220nF-0603

C283 220nF-0603

C284 220nF-0603

C284 220nF-0603

R289

100K-0603

R289

100K-0603

V3P3

V3P3

MSS_RESET_N

RST

C245

NL-0.1uF-0402

C245

NL-0.1uF-0402

C74

NL-0603

C74

NL-0603

R34

10K-0603

R34

10K-0603

1

2

3

4

SW3

KSC403J 50SH LFG

SW3

KSC403J 50SH LFG

VCC

2

GND

3

RST

1

U53

NL-DS1818

U53

NL-DS1818

R35

39R-0603

R35

39R-0603

Summary of Contents for SmartFusion UG0209

Page 1: ...UG0209 User Guide SmartFusion Evaluation Kit ...

Page 2: ...e suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associated with such information is entirely with the Buyer Microsemi does not grant explicitly or implicitly to any party any patent rights licenses or any other IP rights whether with regard to such information itself or ...

Page 3: ... SmartFusion Hard ARM Cortex M3 Processor 12 4 4 Power Sources 12 4 4 1 SmartFusion Power Sources 12 5 Component Descriptions and Connections 13 5 1 VAREF Connections 13 5 2 Current Sensing Circuit 13 5 3 PWM Circuit 13 5 4 Push Button System Reset 14 5 5 Push Button Switches and User LEDs 15 5 6 User I Os 16 5 7 OLED Display 16 5 8 SPI Flash 17 5 9 20 MHz Oscillator 17 5 10 32 768 KHz Low Power O...

Page 4: ... Installing the A2F EVAL KIT 2 Board USB Serial Driver 46 9 1 3 Hooking up the Board and UART Cable 46 9 1 4 Hooking Up the Board and Ethernet Cable 47 9 1 5 Hooking up the A2F EVAL KIT 2 Board Built in Programmer to PC 47 9 1 6 Setting Up the Test Terminal 50 9 2 Running the A2F EVAL KIT 2 Board Test 54 9 2 1 RESET Test 56 9 2 2 UART Test 58 9 2 3 Ethernet Test 60 9 2 4 Analog Test 62 9 2 5 RTC T...

Page 5: ... Correct Orientation 25 Figure 27 Correct Insertion of Daughter Board 25 Figure 28 A2F EVAL KIT 2 PCB Layer Stack Up 40 Figure 29 A2F EVAL KIT 2 Top Silk Screen 41 Figure 30 Serial Terminal Emulation Program HyperTerminal Window 43 Figure 31 SmartFusion Webserver Home page 44 Figure 32 SmartFusion Webserver Real Time Display Web Page 45 Figure 33 Board Manufacturing Test Setup 47 Figure 34 FlashPr...

Page 6: ... EEPROM Test 70 Figure 60 COM1 Setting 70 Figure 61 Connect To Dialog 71 Figure 62 ASCII Setup 71 Figure 63 RS485 Test 72 Figure 64 RS485 Test Message 72 Figure 65 RS485 Test Message 2 73 Figure 66 RS485 Test Passed 73 Figure 67 Select AGL Memory Test 74 Figure 68 AGL Memory Test 75 Figure 69 AGL Test Erasing Chip 75 Figure 70 AGL Test Passed 76 ...

Page 7: ... J22 Header Strip User I Os 7 Table 9 Header for VAREF Monitoring 7 Table 10 JP8 UART Header 7 Table 11 JP9 I2C Header 7 Table 12 J23 SPI Header 8 Table 13 A2F200 Key Features 10 Table 14 A2F200 I O 11 Table 15 UART HyperTerminal Settings 18 Table 16 RVI Header Jumper Settings 22 Table 17 Jumper Settings to Debug with SoftConsole 23 Table 18 Jumper Settings for A2F200 Programming 23 Table 19 Pinou...

Page 8: ...nnections section and modified Figure 3 1 SAR 36580 Modified Push Button Switches and User LEDs section and added Figure 3 9 SAR 36580 Modified text placed at the top of Table 4 1 SAR 36580 Updated Figure 5 2 SAR 36580 Updated Table 6 1 SAR 36580 1 4 Revision 5 0 The following is a summary of the changes in revision 5 0 of this document Modified the paragraph in A2F EVAL KIT Board Failures section...

Page 9: ...Revision History UG0209 User Guide Revision 7 1 2 1 7 Revision 1 0 The Mixed Signal Header section was added ...

Page 10: ...ion Kit 2 2 Board Description The SmartFusion Evaluation Kit board is designed to provide a development platform for users to evaluate all the features of the world s only customizable system on chip with a hard ARM Cortex M3 processor powered microcontroller subsystem MSS along with programmable analog The board supports a SmartFusion cSoC in an FG484 package to enable the MSS analog and features...

Page 11: ...OSC 20 20 MHz 20 PPM clock oscillator OSC 32 32 768 KHz low power oscillator USB UART USB to UART adapter chip CP2102 and connector interfacing with UART port 0 of the SmartFusion MSS ETHERNET RJ45 connector Ethernet jack with magnetics interfacing with National Semiconductor 10 100 PHY chip DP83848C in RMII mode interfacing with Ethernet port of SmartFusion MSS on chip MAC and external PHY CURREN...

Page 12: ...ed by the latest IAR Systems release IAR Embedded Workbench for ARM Refer to Designing SmartFusion with IAR Systems for more information The SmartFusion cSoC is also supported by Keil s latest release MDK ARM Microcontroller Development Kit Refer to SmartFusion Designing with Keil for more information 3 2 Jumpers Settings The recommended default jumpers settings are listed in the following table C...

Page 13: ...or SW4 R1 MSS_SYSRESET System Reset for DUT Table 5 SmartFusion Evaluation Kit LED LED SmartFusion Pin Comment D1 B19 Test LED for user application D2 B20 Test LED for user application D3 C19 Test LED for user application D4 H17 Test LED for user application D5 H20 Test LED for user application D6 C21 Test LED for user application D7 D21 Test LED for user application D8 G21 Test LED for user appli...

Page 14: ...TP8 Digital ground GND TP11 3 3 V supply for SmartFusion cSoC TP12 1 5 V for SmartFusion cSoC TP13 Analog ground AGND Table 8 J22 Header Strip User I Os Pin FPGA I O 1 J19 2 J20 3 J21 4 J22 Table 9 Header for VAREF Monitoring Jumper Description J5 Used to monitor VAREF0 driven from VAREFOUT output of the SmartFusion device J8 Used to monitor VAREF1 driven from VAREFOUT output of the SmartFusion de...

Page 15: ...Installation and Settings UG0209 Revision 7 1 8 The following table lists the J23 SPI header Table 12 J23 SPI Header Pin MSSIO GPIO 1 24 SPI_1_DO 2 25 SPI_1_DI 3 26 SPI_1_CLK 4 27 SPI_1_SS 5 GND ...

Page 16: ...h supports the following Asynchronous memories NOR flash SRAM PSRAM Synchronous SRAMs Two I2 C peripherals Two 16550 compatible UARTs Two SPI peripherals Two 32 bit timers 32 bit watchdog timer 8 channel DMA controller Clock sources 1 5 MHz to 20 MHz main oscillator Battery backed 32 KHz low power oscillator with real time counter RTC 100 MHz embedded RC oscillator 1 accuracy Embedded PLL with 4 o...

Page 17: ... controller EMC 26 bit address 16 bit data DMA 8 Ch I2 C 2 SPI 2 16550 UART 2 32 bit timer 2 PLL 1 32 KHz low power oscillator 1 100 MHz on chip RC oscillator 1 Main oscillator 1 ADCs 12 bit SAR 2 DACs 1 bit sigma delta 2 Signal conditioning blocks SCBs 4 Comparators1 1 The maximum available resources have dependencies For more information about SmartFusion cSoCs see the SmartFusion Customizable S...

Page 18: ... 10 100 Ethernet MAC and are also multiplexed and can be used as FPGA I Os if Ethernet MAC is not used in a design These I Os support Schmitt triggers and support only LVTTL and LVCMOS 1 5 1 8 2 5 and 3 3 V standards The following figure shows the SmartFusion MSS Block Diagram Figure 2 SmartFusion MSS Block Diagram 4 2 I O Pin Connections The A2F200M3F FGG484 pin list is provided in the Pin List p...

Page 19: ...listed below Memory protection unit MPU Single cycle multiplication and hardware divide JTAG debug 4 wire Serial Wire Debug SWD 2 wire and Serial Wire Viewer SWV interfaces The Evaluation board is populated with components to enable development using the MSS These components include SPI flash and communication interfaces such as Ethernet and USB to UART 4 4 Power Sources 4 4 1 SmartFusion Power So...

Page 20: ...T0 pins The current sensing circuit is for the 3 3 V voltage rail as shown in the following figure Figure 5 Current Sensing 5 3 PWM Circuit The PWM RC circuit depicted in Figure 6 page 14 and Figure 7 page 14 can be used with Microsemi CorePWM instantiated in the FPGA fabric to generate various voltage waveforms These voltage VAREF_OUT ADC0 DACOUT0 DACOUT0 VAREF_OUT ADC3 ADC4 ADC5 DACOUT0 ADC2 AGN...

Page 21: ...em Reset F2 200 IO_0 DACOUT1 F2 200 IO_1 F2 200 IO_2 DACOUT0 PWM0 F2 200 IO_8 PWM1 F2 200 IO_3 F2 200 IO_5 MSS_GP_IO_14 MSS_GP_IO_15 F2 200 IO_6 F2 200 IO_7 F2 200 IO_4 F2 200 14 MSSIO 25 F2 200 0 FPGAIO 27 F2 200 1 FPGAIO 29 DGND6 31 F2 200 4 FPGAIO 33 F2 200 6 FPGAIO 35 F2 200 7 FPGAIO 37 F2 200 PWM0 39 DGND8 41 AGND1 43 OBD0 45 AGND3 47 F2 200 15 MSSIO 26 DGND5 28 F2 200 2 FPGAIO 30 F2 200 3 FP...

Page 22: ...ED_ORANGE 0603 R55 1 5K 0603 R55 1 5K 0603 R54 1 5K 0603 R54 1 5K 0603 R39 1 5K 0603 R39 1 5K 0603 R33 1 5K 0603 R33 1 5K 0603 R77 1 5K 0603 R77 1 5K 0603 D2 LED_ORANGE 0603 D2 LED_ORANGE 0603 R36 1 5K 0603 R36 1 5K 0603 D3 LED_ORANGE 0603 D3 LED_ORANGE 0603 D7 LED_ORANGE 0603 D7 LED_ORANGE 0603 D4 LED_ORANGE 0603 D4 LED_ORANGE 0603 D5 LED_ORANGE 0603 D5 LED_ORANGE 0603 D1 LED_ORANGE 0603 D1 LED_O...

Page 23: ...usion Evaluation kit A2F EVAL KIT 2 does not have an OLED component populated on the board For more information see CN1418A Addendum A Designing without OLED Display on Kits Figure 13 OLED Connections Figure 14 SmartFusion MSS I2C0 Interface J19 J20 J21 J22 K19 1 2 3 4 5 J22 5x1 Header M J22 5x1 Header M OLED_BS1 OLED_CS OLED_BS2 V3P3 V10P V3P3 V3P3 MSS_RESET_N OLED_SCL OLED_SDA OLED_D C Mfr P N P...

Page 24: ...tors SPI_CS_N SPI_SCK SPI_SI SPI_WP_N SPI_SO V3P3 V3P3 8 MByte Mfr P N AT25DF641 MWH T Mfr Atmel R209 10K 0603 R209 10K 0603 R208 10K 0603 R208 10K 0603 R206 39R 0603 R206 39R 0603 C70 0 1uF 10V 0402 C70 0 1uF 10V 0402 SI 5 SCK 6 HOLD 7 CS 1 WP 3 VCC 8 GND 4 SO 2 E_GND 9 U13 AT25DF641 MWH T U13 AT25DF641 MWH T SPI_CS_N SPI_SI SPI_SO SPI_SCK SPI_0_DO GPIO_16 U17 SPI_0_SS GPIO_19 Y20 SPI_0_DI GPIO_1...

Page 25: ...a serial communications application program that can be installed in the Windows operating system A basic HyperTerminal program is usually distributed with Windows With a USB driver properly installed and the correct COM port and communication settings selected use the HyperTerminal program to communicate with a design running on the SmartFusion cSoC The following table lists the supported UART pa...

Page 26: ...Inc U16 CP2102 GM MANUFACTURER P N CP2102 GM MANUFACTURER Silicon Laboratories Inc R51 10K 0603 R51 10K 0603 C76 1uF 0603 C76 1uF 0603 R50 147R 0603 R50 147R 0603 1 1 TPV1 DTR TP_VIA TPV1 DTR TP_VIA 1 1 TPV2 DSR TP_VIA TPV2 DSR TP_VIA 1 1 TPV4 DCD TP_VIA TPV4 DCD TP_VIA D11 LED_GREEN 0603 D11 LED_GREEN 0603 F2 MICROSMD050F 2 1210 MANUFACTURER P N MICROSMD050F 2 MANUFACTURER Tyco F2 MICROSMD050F 2 ...

Page 27: ...ta over a network The embedded system memory and control registers can be accessed and processed remotely to support system management 5 12 1 Clocking Scheme for RMII CLK The 10 100 MAC RMII interface requires a 50 MHz clock The PHY device also requires a 50 MHz 20 PPM clock for proper operation While there are several possible ways of providing the clock the following clocking scheme are tested o...

Page 28: ...F 16V TantA R73 Nl 4 87K 0603 R73 Nl 4 87K 0603 R74 4 87K 0603 R74 4 87K 0603 R72 110R 0603 R72 110R 0603 R242 22R 0603 R242 22R 0603 R67 2 2K 0603 R67 2 2K 0603 C91 0 1uF 10V 0402 C91 0 1uF 10V 0402 C92 0 1uF 10V 0402 C92 0 1uF 10V 0402 R63 22R 0603 R63 22R 0603 MDIO 30 MDC 31 CRS CRS_DV LED_CFG 40 COL PHYAD0 42 TX_CLK 1 TXD_0 3 TXD_1 4 TXD_2 5 TXD_3 SNI_MODE 6 TX_EN 2 RX_CLK 38 RXD_0 PHYAD1 43 R...

Page 29: ...rogrammer The board comes with a built in programmer to program the SmartFusion cSoC device and debug software with SoftConsole Table 16 RVI Header Jumper Settings To Debug with Keil U link or IAR J link Jumper Pin Pin Connection Details JP7 2 3 To select RealView JTG header JP10 2 3 To select Cortex M3 processor debug RVI_nTRST RVI_TDO RVI_TMS RVI_TCK RVI_TDI V3P3 MSS_RESET_N R12 10K 0603 R12 10K...

Page 30: ... 0603 A1 2 OE1 1 Y1 6 VCC 8 GND 4 U60A NC7WV125K8X US8 U60A NC7WV125K8X US8 3 1 2 4 R G D13 HSMF C165 R G D13 HSMF C165 R510 2K2 0603 R510 2K2 0603 D14 LTST C190YKT D14 LTST C190YKT IO2 2 IO3 3 IO4 4 IO5 5 IO6 6 IO7 7 IO8 8 IOGLMX1 10 GL1 11 NPECL1 13 PPECL1 15 GL2 16 IO18 18 IO19 19 IO20 20 IO21 21 IO22 22 IO23 23 IO24 24 GND1 1 GND9 9 GND25 25 GND38 38 GND40 40 AGND12 12 IO27 27 IO28 28 IO29 29 ...

Page 31: ...pitch Samtec CLP 150 02 L DH The detailed instructions given below must be followed to ensure the correct orientation and insertion into the mother board The following figure top view shows the orientation of the mixed signal headers on the mother board and daughter board F2_TDO F2_TMS TDI VPUMP VJTAG TRST F2_TCK JTAG_SEL JTAG_SEL V3P3_F2 V3P3_F2 V3P3_F2 C64 0 1uF 0402 C64 0 1uF 0402 R9 1K 0603 R9...

Page 32: ... so there is a good connection with the mating connector This is applicable when designing the daughter board or the mother board When designing a daughter board to plug into an A2F EVAL KIT 2 Ensure the CLP header edge is lined up against the edge of the board Mother Board Daughter Board Pin 1 Pin 2 Mother Board Daughter Board FTSH HDR CLP HDR Correct Mother Board Daughter Board FTSH HDR CLP HDR ...

Page 33: ...tal ground 16 MSS_GP_IO_7 W2 MSS I Os1 17 MSS_GP_IO_8 T3 MSS I Os1 18 MSS_GP_IO_9 V3 MSS I Os1 19 MSS_GP_IO_10 U3 MSS I Os1 20 DGND DGND Digital ground 21 MSS_GP_IO_11 T4 MSS I Os1 22 MSS_GP_IO_12 AA2 MSS I Os1 23 DGND DGND Digital ground 24 MSS_GP_IO_13 AB2 MSS I Os1 25 MSS_GP_IO_14 AB3 MSS I Os1 26 MSS_GP_IO_15 Y3 MSS I Os1 27 F2 200 IO_0 E3 FPGA I Os1 28 DGND DGND Digital ground 29 F2 200 IO_1 ...

Page 34: ...8 ADC5 V12 ADC5 79 AGND AGND Analog ground 80 AGND AGND Analog ground 81 ADC6 V11 ADC62 82 ADC7 T12 ADC72 83 AGND AGND Analog ground 84 AGND AGND Analog ground 85 NC NC NC 86 NC NC NC 87 AGND AGND Analog ground 88 AGND AGND Analog ground 89 NC NC NC 90 NC NC NC 91 AC1 U9 CM12 92 AGND AGND Analog ground 93 AGND AGND Analog ground 94 AGND AGND Analog ground 95 DGND DGND Digital ground 96 DGND DGND D...

Page 35: ...NC A7 GND8 GND A8 EMC_AB 0 IO04NDB0V0 NC A9 EMC_AB 1 IO04PDB0V0 NC A10 GND2 GND A11 NC1 NC A12 EMC_AB 7 IO07PDB0V0 NC A13 GND3 GND A14 EMC_AB 12 IO10NDB0V0 NC A15 EMC_AB 13 IO10PDB0V0 NC A16 GND4 GND A19 GND5 GND A20 NC3 NC A21 NC4 NC A22 GND6 GND AA1 GPIO_4 IO43RSB4V0 MSS_GP_IO_4 AA2 GPIO_12 IO37RSB4V0 MSS_GP_IO_12 AA3 MAC_MDC IO48RSB4V0 FPGA_ENA_MDC AA4 MAC_RXER IO50RSB4V0 FPGA_ENA_RXER AA5 MAC_...

Page 36: ...14 IO35RSB4V0 MSS_GP_IO_14 AB4 GND11 GND AB5 PCAP C49 AB6 NCAP C49 AB7 ABPS3 AV2_1 AB8 ADC3 ADC3 AB9 GND15ADC0 AGND AB10 VCC33ADC1 V3P3A AB11 VAREF1 VAREF_OUT AB12 TM2 AT2 AB13 CM2 AC2 AB14 ABPS4 V3P3 AB15 GNDAQ1 AGND AB16 GNDMAINXTAL AGND AB17 GNDLPXTAL AGND AB18 VCCLPXTAL V3P3A AB19 VDDBAT GND AB20 PTBASE PTBASE AB21 NC8 NC AB22 GND10 GND B1 EMC_DB 15 GAA2 IO71PDB5V0 NC B2 GND12 GND B5 VCCFPGAIO...

Page 37: ...2 IO20PDB1V0 F2 200 IO_6 C1 EMC_DB 14 GAB2 IO71NDB5V0 NC C2 NC9 NC C3 NC11 NC C6 EMC_CLK GAA0 IO00NDB0V0 NC C9 EMC_BYTEN 1 GAC1 IO02PDB0V0 NC C10 EMC_OEN1_N IO03PDB0V0 NC C11 GND14 GND C12 VCCFPGAIOB0_5 V3P3_F2 C13 EMC_AB 8 IO08NDB0V0 NC C14 EMC_AB 16 IO12NDB0V0 NC C15 EMC_AB 17 IO12PDB0V0 NC C16 EMC_AB 24 IO16NDB0V0 NC C17 EMC_AB 22 IO15NDB0V0 NC C18 EMC_AB 23 IO15PDB0V0 NC C19 GBA0 IO19NPB0V0 LE...

Page 38: ...0 LED7_N D22 GND18 GND E1 GFC2 IO67PPB5V0 NC E2 VCCFPGAIOB5_1 V3P3_F2 E3 GFA2 IO68PDB5V0 F2 200 IO_0 E4 GND22 GND E5 NC18 NC E6 GNDQ1 GND E7 VCCFPGAIOB0_12 V3P3_F2 E9 NC19 NC E10 VCCFPGAIOB0_6 V3P3_F2 E11 EMC_AB 4 IO06NDB0V0 NC E12 EMC_AB 5 IO06PDB0V0 NC E13 VCCFPGAIOB0_13 V3P3_F2 E14 GBC0 IO17NPB0V0 NC E15 NC16 NC E16 VCCFPGAIOB0_7 V3P3_F2 E17 VCOMPLA1 NC E19 GND21 GND E20 NC17 NC E21 VCCFPGAIOB1...

Page 39: ...18 VCCFPGAIOB1_2 V3P3_F2 F19 IO23NDB1V0 NC F22 IO22PDB1V0 F2 200 PWM1 G1 GND23 GND G2 GFB0 IO65NPB5V0 NC G3 EMC_DB 9 GEC1 IO63PDB5V0 NC G4 GFC1 IO66PPB5V0 F2 200 IO_2 G5 EMC_DB 11 IO69PPB5V0 NC G6 GNDQ4 GND G7 NC25 NC G8 GND28 GND G9 VCCFPGAIOB0_11 V3P3_F2 G10 GND24 GND G11 VCCFPGAIOB0_8 V3P3_F2 G12 GND25 GND G13 VCCFPGAIOB0_9 V3P3_F2 G14 GND26 GND G15 VCCFPGAIOB0_10 V3P3_F2 G16 GNDQ3 GND G19 GCA2...

Page 40: ...5 GND31 GND H16 VCCFPGAIOB1_3 V3P3_F2 H17 IO25NDB1V0 LED4_N H18 GCC2 IO25PDB1V0 NC H19 GND32 GND H20 GCC0 IO26NPB1V0 LED5_N H21 VCCFPGAIOB1_4 V3P3_F2 H22 GCB0 IO27NDB1V0 NC J1 EMC_DB 6 GEB0 IO62NDB5V0 NC J2 EMC_DB 5 GEA1 IO61PDB5V0 NC J3 EMC_DB 4 GEA0 IO61NDB5V0 NC J4 EMC_DB 3 GEC2 IO60PPB5V0 NC J5 VCCFPGAIOB5_4 V3P3_F2 J6 GFA0 IO64NDB5V0 F2 200 IO_5 J7 VCCFPGAIOB5_5 V3P3_F2 J8 GND40 GND J9 VCC8 V...

Page 41: ...6 GND K8 VCC12 V1P5_DUT K9 GND47 GND K10 VCC9 V1P5_DUT K11 GND42 GND K12 VCC10 V1P5_DUT K13 GND43 GND K14 VCC11 V1P5_DUT K15 GND44 GND K16 VCCFPGAIOB1_6 V3P3_F2 K18 GDA1 IO31PDB1V0 NC K19 GDA0 IO31NDB1V0 J22 5 K20 GDC1 IO29PDB1V0 NC K21 GDC0 IO29NDB1V0 NC K22 GND45 GND L4 GND52 GND L7 VCCFPGAIOB5_10 V3P3_F2 L8 GND53 GND L9 VCC16 V1P5_DUT L10 GND48 GND L11 VCC13 V1P5_DUT L12 GND49 GND L13 VCC14 V1P...

Page 42: ...4 GND M12 VCC18 V1P5_DUT M13 GND55 GND M14 VCC19 V1P5_DUT M15 GND56 GND M16 VCCFPGAIOB1_8 V3P3_F2 M17 NC26 NC M18 GDB2 IO33PDB1V0 NC M19 VJTAG VJTAG M20 GND57 GND M21 VPP VPUMP M22 IO32NDB1V0 NC N1 GND60 GND N5 VCCFPGAIOB5_7 V3P3_F2 N7 VCCFPGAIOB5_8 V3P3_F2 N8 GND65 GND N9 VCC24 V1P5_DUT N10 GND61 GND N11 VCC21 V1P5_DUT N12 GND62 GND N13 VCC22 V1P5_DUT N14 GND63 GND N15 VCC23 V1P5_DUT N17 NC27 NC ...

Page 43: ...14 VCC27 V1P5_DUT P15 GND68 GND P16 VCCFPGAIOB1_10 V3P3_F2 P17 TDI TDI P18 TCK F2_TCK P19 GND69 GND P20 TMS F2_TMS P21 TDO F2_TDO P22 TRSTB TRST R1 MSS_RESET_N MSS_RESET_N R2 VCCFPGAIOB5_9 V3P3_F2 R3 GPIO_1 IO46RSB4V0 MSS_GP_IO_1 R4 NC35 NC R5 NC36 NC R6 NC37 NC R7 NC38 NC R8 GND76 GND R9 VCC32 V1P5_DUT R10 GND73 GND R11 VCC29 V1P5_DUT R12 GND74 GND R13 VCC30 V1P5_DUT R14 GND75 GND R15 VCC31 V1P5_...

Page 44: ...1P5A T10 GNDAQ0 AGND T11 GND33ADC01 AGND T12 ADC7 ADC7 T13 AT4 NC T14 VAREF2 NC T15 VAREFOUT VAREF_OUT T17 SPI_1_DO GPIO_24 NC T18 GND78 GND T22 GND79 GND U1 GND81 GND U2 GPIO_5 IO42RSB4V0 MSS_GP_IO_5 U3 GPIO_10 IO58RSB4V0 MSS_GP_IO_10 U5 MAC_RXD 1 IO53RSB4V0 FPGA_ENA_RXD1 U6 NC39 NC U7 VCC33AP V3P3A U8 VCC33N AGND U9 CM1 AC1 U10 VAREF0 VAREF_OUT U11 GND33ADC11 AGND U12 ADC4 ADC4 U13 ATGND_02 NC U...

Page 45: ...84 GND V7 SDD0 DACOUT0 V8 ABPS1 V1P5 V9 ADC2 ADC2 V10 VCC33ADC0 V3P3A V11 ADC6 ADC6 V12 ADC5 ADC5 V13 ABPS5 AV2_2 V14 ADC8 NC V16 NC40 NC V17 GND83 GND V18 SPI_0_DI GPIO_17 SPI_SO V19 SPI_1_DI GPIO_25 NC V20 UART_1_TXD GPIO_28 NC V21 I2C_0_SDA GPIO_22 OLED_SDA V22 I2C_1_SDA GPIO_30 NC W1 GPIO_2 IO45RSB4V0 MSS_GP_IO_2 W2 GPIO_7 IO40RSB4V0 MSS_GP_IO_7 W3 GND86 GND W4 MAC_CRSDV IO51RSB4V0 FPGA_ENA_CR...

Page 46: ... W22 UART_1_RXD GPIO_29 NC Y1 GPIO_3 IO44RSB4V0 MSS_GP_IO_3 Y3 GPIO_15 IO34RSB4V0 MSS_GP_IO_15 Y4 MAC_TXEN IO52RSB4V0 FPGA_ENA_TXEN Y7 CM0 AC0 Y8 GNDTM0 ATGND0 Y9 ADC0 ADC0 Y10 VCC15ADC0 V1P5A Y11 ABPS7 AV2_3 Y12 TM3 AT3 Y13 AV1_4 NC Y16 VCCMAINXTAL V3P3A Y17 SDD1 DACOUT1 Y18 PTEM V1P5_INT Y19 VCC33A V3P3A Y20 SPI_0_SS GPIO_19 SPI_CS_N Y22 UART_0_TXD GPIO_20 TXD_0_OUT Table 20 Pin List39 continued...

Page 47: ...om products fpga soc design resources dev kits smartfusion smartfusion evaluation kit documents To view the PCB design layout files use the Allegro Free Physical Viewer which can be downloaded at www cadence com products pcb Pages Downloads aspx The layers are arranged in the following order Layer1 Top Signal Layer2 GND1 Layer3 PWR1 Layer4 PWR2 Layer5 GND2 Layer6 Bottom Signal The following figure...

Page 48: ...Board Stack up UG0209 User Guide Revision 7 1 41 The following figure shows the silkscreen top view Figure 29 A2F EVAL KIT 2 Top Silk Screen ...

Page 49: ...also lights up indicating UART link establishment Connect an ethernet cable from the local area network to J10 the A2F EVAL KIT 2 ethernet jack This demo provides you the flexibility to select demo options using switches or serial terminal emulation programs like HyperTerminal or PuTTy With a USB driver properly installed and correct COM port and communication settings selected you can use the ser...

Page 50: ... the values of the POT voltage POT current and external temperature read by the analog computing engine ACE of SmartFusion cSoC Rotate the POT provided on the SmartFusion evaluation board to observe the change in the POT values 8 4 Webserver Mode Multimeter mode and the Webserver mode can be selected by pressing 1 in the serial terminal emulation program This displays the IP address captured by DH...

Page 51: ...owse the Webserver utility The following figure shows the SmartFusion Webserver home page Figure 31 SmartFusion Webserver Home page Note Internet Explorer version 6 0 should be used to run the Webserver utility with proper web page visibility Also the PC Ethernet card link speed should be in Auto Detect mode or fixed to 100 Mbps speed ...

Page 52: ...he change in the voltage and current values Click the Home button to go back to Home page The following figure shows the SmartFusion Webserver Real Time Display web page Figure 32 SmartFusion Webserver Real Time Display Web Page 8 6 LED Test Press switch SW2 to scroll the menu and then press SW1 to select LED test Observe the blinking of LEDs available on the SmartFusion Evaluation Kit Refer to th...

Page 53: ...le check 9 1 2 Installing the A2F EVAL KIT 2 Board USB Serial Driver 1 Download and extract all the files from CP210x_driver zip 2 Double click on the file named CP210x_VCP_Win2K_XP_S2K3 exe 3 Click Install in the Install Wizard and select Yes for the licensing agreement 4 Restart the computer on which the driver was installed After restart the driver can be used to communicate with A2F EVAL KIT 2...

Page 54: ...an IP address to the web server on the board Network firewalls must not block the web server Figure 33 Board Manufacturing Test Setup 9 1 5 Hooking up the A2F EVAL KIT 2 Board Built in Programmer to PC Connect the second mini USB cable to connection J13 on the board labeled USB1 in Figure 33 page 47 Plug in the second side of the cable to the PC USB port This establishes connection to the built in...

Page 55: ...Manufacturing Test UG0209 User Guide Revision 7 1 48 1 Open FlashPro programming software Figure 34 FlashPro New Project Setup ...

Page 56: ...choosing the programming mode 4 Click the Configure Programmer button This makes the Load Existing Programming File button available 5 Browse the PC file system to find the A2F EVAL KIT stp programming file Click Open to select the A2F EVAL KIT stp file Figure 36 Selecting Manufacturing Test STAPL File 6 Click the Program to program the A2F EVAL KIT 2 board ...

Page 57: ...Guide Revision 7 1 50 9 1 6 Setting Up the Test Terminal 1 Open the Windows start menu Select All Programs Accessories Communications and select the HyperTerminal program This opens HyperTerminal Figure 37 HyperTerminal Program Setup ...

Page 58: ...onnection description window is displayed Type A2F EVAL KIT as the name of the new HyperTerminal session and click the OK Figure 38 HyperTerminal Setup 3 The Connect To window is displayed Select the COM4 serial connection Figure 39 HyperTerminal Port Selection ...

Page 59: ... UG0209 User Guide Revision 7 1 52 4 The COM4 Properties window is displayed Select the following settings Bits per second 19200 Data bits 8 Parity None Stop bits 1 Flow Control None Figure 40 HyperTerminal Port Settings ...

Page 60: ...Manufacturing Test UG0209 User Guide Revision 7 1 53 5 Goto File Properties in the HyperTerminal window and select Settings tab Figure 41 HyperTerminal Properties ...

Page 61: ...on 7 1 54 6 Click ASCII Setup Select the check box labeled Append line feeds to incoming line ends Figure 42 ASCII Character Settings 9 2 Running the A2F EVAL KIT 2 Board Test Press RESET SW3 on the A2F EVAL KIT 2 board to start the test program ...

Page 62: ...the above message still does not appear refer to the Setting Up the Test Terminal page 50 and check to see that the terminal is set up correctly Note The latest revision of SmartFusion Evaluation kit does not contain a OLED display For more information see PCN 1207 New Revisions of Hardware Kits A2F EVAL KIT A2F500 DEV KIT A3PE STARTER KIT and CN1418A Addendum A Designing without OLED Display on K...

Page 63: ...anufacturing Test UG0209 User Guide Revision 7 1 56 9 2 1 RESET Test 1 Enter 0 in the terminal to begin the reset test The resulting display should be similar to the following figure Figure 44 Reset Test ...

Page 64: ...Manufacturing Test UG0209 User Guide Revision 7 1 57 2 If the menu appears correct enter the character Y into the terminal Figure 45 Reset Test Result ...

Page 65: ...Manufacturing Test UG0209 User Guide Revision 7 1 58 9 2 2 UART Test 1 Enter 1 in the terminal to begin the UART test Figure 46 UART Test ...

Page 66: ...Manufacturing Test UG0209 User Guide Revision 7 1 59 2 Type the character Y into the terminal The following window should appear Figure 47 UART Test Result ...

Page 67: ...Manufacturing Test UG0209 User Guide Revision 7 1 60 9 2 3 Ethernet Test 1 Enter 2 in the terminal to begin the Ethernet test The following windows should appear Figure 48 Ethernet Test ...

Page 68: ...Manufacturing Test UG0209 User Guide Revision 7 1 61 Figure 49 Ethernet Test Result Note The IP address may vary in the network setup ...

Page 69: ...Manufacturing Test UG0209 User Guide Revision 7 1 62 9 2 4 Analog Test 1 Enter 3 in the terminal to begin the Analog test The following window should appear Figure 50 Analog Test ...

Page 70: ...er Guide Revision 7 1 63 2 Locate POT RV on the bottom left hand corner of the board Turn POT RV1 counter clockwise all the way to the left as shown in the following figure Figure 51 POT RV1 Figure 52 Analog Test Starting Results ...

Page 71: ...uring Test UG0209 User Guide Revision 7 1 64 3 Turn POT RV clockwise all the way clockwise to the right The display on the terminal should be similar to the following figure Figure 53 Analog Test Ending Results ...

Page 72: ...Manufacturing Test UG0209 User Guide Revision 7 1 65 9 2 5 RTC Test 1 Enter 5 in the terminal to begin the RTC test Figure 54 RTC Test ...

Page 73: ...Manufacturing Test UG0209 User Guide Revision 7 1 66 2 After a few seconds the following window should appear Figure 55 RTC Test Passed ...

Page 74: ...Manufacturing Test UG0209 User Guide Revision 7 1 67 9 2 6 SPI Test 1 Enter 6 in the terminal to begin the SPI test After several seconds the following window should appear Figure 56 SPI Test ...

Page 75: ...ayed Figure 57 LED Test 2 Press push buttons SW1 SW2 SW3 SW4 and SW5 When any of these buttons is pressed the LEDs should light up 3 Then press DIP1 DIP2 DIP3 DIP4 This should light up each of the 4 LEDs 4 If you observed the LEDs light up enter Y in the terminal Otherwise enter N If Y was entered the screen shown in the following figure will be displayed ...

Page 76: ...Manufacturing Test UG0209 User Guide Revision 7 1 69 Figure 58 Switch Test ...

Page 77: ...rminal to begin the I2C EEPROM test The screen shown in the following figure is displayed after few seconds Figure 59 I2 C EEPROM Test 9 2 9 RS485 Test 1 Open another terminal window this time set to COM Configure as shown in Figure 60 page 70 through Figure 62 page 71 Figure 60 COM1 Setting ...

Page 78: ...Manufacturing Test UG0209 User Guide Revision 7 1 71 Figure 61 Connect To Dialog Figure 62 ASCII Setup ...

Page 79: ...n 7 1 72 2 Enter A into the terminal to begin the RS485 test The screen shown in the following figure is displayed Figure 63 RS485 Test The display in the COM1 terminal window should be similar to the following figure Figure 64 RS485 Test Message ...

Page 80: ...3 Enter the character Y into this terminal The display on the COM1 terminal should be similar to the following figure Figure 65 RS485 Test Message 2 4 The display on the COM4 terminal should be as shown in the following figure Figure 66 RS485 Test Passed ...

Page 81: ...s JP17 JP19 and JP16 in the following positions JP17 1 2 JP19 1 2 JP16 1 2 3 Turn on board power by flipping switch SW6 Press the reset button SW8 The screen shown in the following figure should appear Figure 67 Select AGL Memory Test 4 Enter B into the terminal to begin the AGL memory test The screen shown in the following figure is displayed ...

Page 82: ...uide Revision 7 1 75 Figure 68 AGL Memory Test 5 When the jumpers are set enter Y into the terminal The display on the terminal should be similar to the following figure and eventually Figure 70 page 76 Figure 69 AGL Test Erasing Chip ...

Page 83: ...ing the A2F EVAL KIT 2 Board Test page 54 should result in the words TEST PASSED being printed on the terminal If this does not happen or the words TEST FAILED are printed the test has failed If the A2F EVAL KIT 2 board fails any of the tests outlined in Running the A2F EVAL KIT 2 Board Test page 54 the board being tested is not functional ...

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