Microchip Technology SAM E70 Xplained Ultra, User Manual

Page: 30 / 58

AT32
UC
3A
4256J-
C1
UR
AT
32
UC
3A
42
56
J-C
1U
R
PA00 / PA1
8
G8
VDDIO
F6VDDIO
F2VDDIO
B6
GNDIO
C8
VDDIO
J5
GNDIO
E2GNDIO
H3
GNDIO
F5
VDDIO
B5
GNDIO
E6
GNDIO
C3
GNDC ORE
F10VDD
CORE
E10
GNDPLL
B10VDDIN
D10
VDDA NA
J6
VDDIN
D9
GNDA NA
H8
VDDIO
E5
PA01 / PA1
7
G10
PA02 / PX4
7
E1
PA03
F9
PA04
E9
PA05
G9
PA06 / PA1
3
E8
PA07 / PA1
9
H10
PA08
F8
PA09
D8
PA10
C10
PA11
C9
PA12 / PA2
5
G7
PA14 / PX1
1
K7
PA15 / PX4
5
J7
PA16
E7
PA20 / PX1
8
H9
PA21 / PX2
2
K10
PA23 / PX4
6
G6
PA24 / PX1
7
J10
PA26 / PB0
5
F7
PA27
A2
PA28
A1
PA29
B4
PA30
A4
PA31
C2
PA22 / PX2
0
H6
PC00 /PX14
K5
PC01K6
PC02A5
PC03A6
PC04B7
PC05A7
TMS
H7
TDO
J8
TDI
K8
TCK
K9
RESET_N
J9
DMHS
A9
DPHS
A8
DMFS
B9
DPFS
B8
USB_VBUS
A10
USB_VBIAS
C7
PB00B1
PB01B2
PB02B3
PB03C4
PB04A3
PB06D7
PB07D6
PB08C6
PB09C5
PB10D5
PB11C1
PX00
G4
PX01
G2
PX02
G3
PX03
J1
PX04
H1
PX05
G1
PX06
F3
PX07
F4
PX08
E3
PX09
E4
PX10
D2
PX12
D1
PX13
D3
PX15 / PX3
2
K4
PX16 / PX5
3
D4
PX19 / PX5
9
F1
PX21
H2
PX23
K1
PX24
J2
PX25
H4
PX26
J3
PX27
K2
PX28
K3
PX29
J4
PX30
G5
PX31
H5
U300
TXD RXD
EDBG_UART
EDBG_UART
DGI_I2C
EDBG_CDC_USART_R
X
GN
D
GN
D
VCC_
EDBG_P3V
3
GN
D
GN
D
GN
D
GN
D
GN
D
VCC_EDBG_USB_
P5
V0
EDBG_USB_HS_
N
EDBG_USB_HS_
P
EDBG_USB_FS_
P
EDBG_USB_FS_
N
Shi eld
EDBG_CDC_USAR
T_
TX
STATUS_LED_
CT
RL
POWER_LED_
CT
RL
XIN 0
XOU T0
MISO MOSI SCK SS
DGI_SPI
DGI_SPI
EDBG_SPI_DGI_MIS
O
EDBG_SPI_DGI_MOS
I
EDBG_SPI_DGI_
SC
K
ED
BG
_SP
I_
DG
I_
SS
VCC_
EDBG_P3V
3
ED
BG
_DGI
_SD
A
ED
BG
_DGI
_S
CL
DGI_GPIO0 DGI_GPIO1 DGI_GPIO2 DGI_GPIO3
DGI_GPIO
DGI_GPIO
0
DGI_GPIO
1
DGI_GPIO
ID_1 ID_2 ID_4
ID_SYS
ID_SYS
ID
1
ID
1
ID2
EDBG_FORCE_BOO
T
Current limiters, 10mA @3.3
V
Curr
en
t limite
r, 10
m
A
@3
.3
V
GN
D
GN
D
EDBG_FORCE_BOO
T
ED
BG_
RE
SET
_N
EDBG_JTAG_TM
S
EDBG_JTAG_TD
O
EDBG_JTAG_TD
I
EDBG_JTAG_
TCK
VCC_EDBG_P3V
3
GN
D
VCC_
EDBG_P3V
3
EDBG Power and Status LEDs
GN
D
SCL
SDA
DGI_I2C
EDBG_ADC
0
ID
2
GN
D
VCC_EDBG_
P3
V3
GN
D
SWCLK SWDIO TARGET_CHIP_RESET TRACESWO
EDBG_SWD
EDBG_SWD
ED BG _SW DIO
ED BG _SW CLK
EDBG_RESE
T
TARGET_RESET_SENSE
DGI_GPIO
2
DGI_GPIO
3
2 1
EL17-21SYGC D301
2 1
EL17-21UYC/A3
D302
4
5
3
2N7002DW
Q302A
2
1 6
2N7002DW
Q302B
330R
R331
330R
R333
0R
R321
330R
R326
0R
R329
0R
R327
TP302 TP303 TP304 TP306 TP305 TP307
39R
R318
39R
R316
BLM18PG471SN1
L300
1 nF C0
G
C301
1 nF C0
G
C302
BLM18PG471SN1
L301
100n
C305
1 nF C0
G
C307
2.2u
F
C306
GN
D
100n C310
2.2u
F
C308
1k
R313
1k
R314
0R
R303
0R
R304
TP301
TP300
330R
R307
330R
R308
330R
R309
330R
R310
330R
R306
0R
R305
0R
R311
0R
R312
1
3
2
4
12.00MH
z
XC300
4.7
n
DNP C300
10
p
C303
22
p
C304
22
p
C309
1M 1M R300
1M 1M
R330
1M 1M
R332
6.81k
R320
VCC_EDBG_
P3
V3
330R
R322
330R
R323
330R
R324
330R
R325
GN
D
GN
D
0R
R301
EGND_EDB
G
EGND_EDB
G
GN
D
EDBG_TARGET_RESET
GN
D
0R
R302
1k
R315
ID
4
TARGET_VOLTAGE
GN
D
100n C311
100n C312
100n C313
2.2u
F
C314
2.2u
F
C315
VCC_
EDBG_P3V
3
GREEN
YELLOW
39R 39R
R328
CONN USB MICRO B RECPT SMT R/
A
VBUS
1
D-
2
D
+
3
GND
5
SHIELD1
6
SHIELD2
7
ID
4
SHIELD3
8
SHIELD4
9
J300
3 5
GND VCC
2 1
IO1
IO2
IO3
4
D30
0
TPD3E001DRL
R
GND
GND
VCC_EDBG_
P3
V3
100k R319
1
2 3
D
M
N
2075
U
Q301
M
O
SF
ET
_N
_G
SD
3
1
2
IRLM
L5
203
PB
F
Q300
M
O
SFET_P_
G
SD
100k
R317
LE
D
1
LE
D
2
Inpu
t f
ilte
r on USB
power input
.
Connect the test points during startup
of
th
e
EDBG
to for
ce
it
in
to boo
tlo
ad
er
m
od
e.
The test points should be covered with solder so that it is easier to get a good contact
.
Programming interface of the em
be
dd
ed d
ebugg
er.
Th
e
te
st
points will be connected by needles in
th
e
te
st f
ix
tur
e for progr
ammi
ng.
GND
te
st po
in
t i
s T
P400
.
Hardware
©
2019 Microchip Technology Inc.
DS70005389A-page 30