Microchip Technology Microsemi PolarFire MPF 300T-1FCG1152E User Manual Download | Manualshive

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PolarFire MPF300T FPGA Video Kit

50200872 UG0872 User Guide Revision 1.0

14

Figure 12 • XCVR1 and XCVR3 Interface

4.8.3

XCVR2 Block

The lanes of the XCVR2 block are connected to HDMI2.0 TX and RX chips via the line drivers chips, as

shown in the following figure. This interface can operate up to 6 Gbps.

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Summary of Contents for Microsemi PolarFire MPF 300T-1FCG1152E

Page 1: ...UG0872 User Guide PolarFire MPF300T FPGA Video Kit June 2019...

Page 2: ...onnector CSI 2 Application 10 4 5 MIPI TX Connector DSI Application 11 4 6 MIPI TX Connector CSI 2 Application 11 4 7 MIPI TX and RX PCB Loopback 12 4 8 Transceivers 12 4 8 1 XCVR0 Block 12 4 8 2 XCVR...

Page 3: ...ision 1 0 1 1 Revision History The revision history describes the changes that were implemented in the document The changes are listed by revision starting with the most current publication 1 1 Revisi...

Page 4: ...er lanes UART Interface to the FTDI device SPI Interface to the SPI Flash device 2 1 Kit Contents The following table lists the contents of the PolarFire Video Kit Table 1 Kit Contents Item Quantity D...

Page 5: ...0T FPGA Video Kit 50200872 UG0872 User Guide Revision 1 0 3 Figure 1 Block Diagram 2 3 Board Overview The following figure shows a labeled image of the video board highlighting its components Figure 2...

Page 6: ...the PolarFire device using FlashPro4 or FlashPro5 In the FlashPro software the appropriate programmer FlashPro4 orFlashPro5 must be selected SPI flash U30 One 1 Gb SPI Flash from Micron MT25QL01GBBB8E...

Page 7: ...72 UG0872 User Guide Revision 1 0 5 Component Label on Board Description USER Reset switch SW3 Push button system reset for the PolarFire device Users must program this HSIO for PolarFire logic reset...

Page 8: ...or Bank4 voltage Close pin2 4 for 3V3 Close pin2 4 for 2V5 Closed Open J25 Jumper to select the PolarFire VCCIO voltage VCCIO_HPC_VADJ Close pin 1 and 2 for 3 3 V Close pin 3 and 4 for 2 5 V Close pin...

Page 9: ...or more information about these power supply devices see https www microchip com design centers power management dc dc converters regulators The following table lists the key power supplies required f...

Page 10: ...VQFN 5A VDDAUX2 5 MIC23303YML T5 IC REG BUCK ADJ 3A SYNC 12DFN 3A VDDAUX4 MIC23303YML T5 IC REG BUCK ADJ 3A SYNC 12DFN 3A VCCIO_HPC_VADJ MIC24046YFL TR IC REG BUCK PROG 5A SYNC 20VQFN 5A VREF VTT MIC5...

Page 11: ...ips are used as flexible volatile memory for user applications The DDR4 interface is implemented in the HSIO Bank 0 and Bank 7 The DDR4 SDRAM specifications are as follows MT40A256M16GE 083E B Quantit...

Page 12: ...s implemented in Bank6 The HDMI1 4 transmitter specifications for the PolarFire device are Part Number of the HDMI Transmitter ADV7511KSTZ Operating frequency up to 225 MHz 4 4 MIPI RX Connector CSI 2...

Page 13: ...e connected through the J26 connector on the video board This adaptor board contains the LCD mating connector and the auxiliary circuit required for the display For more information see the video boar...

Page 14: ...as shown in the following figure Figure 10 MIPI TX and RX Loopback 4 8 Transceivers The PolarFire FPGA device has 4 XCVR blocks and each block contains 4 MPF300T 1FCG1152E transceiver lanes These lan...

Page 15: ...he FMC HPC connector and the signals are routed on the PCB as follows Lanes 0 to 7 are directly routed to the FMC HPC TX pad trace via to bottom layer trace FMC HPC connector pad RX pad trace via to T...

Page 16: ...ser Guide Revision 1 0 14 Figure 12 XCVR1 and XCVR3 Interface 4 8 3 XCVR2 Block The lanes of the XCVR2 block are connected to HDMI2 0 TX and RX chips via the line drivers chips as shown in the followi...

Page 17: ...sourced from the on board HMDI2 0 TX 4 9 Programming The PolarFire device is programmed using the on board FlashPro5 programmer or through the JTAG Header For more information about programming see t...

Page 18: ...er 4 10 50 MHz Oscillator A 50 MHz clock oscillator with an accuracy of 50 ppm is available on the board This clock oscillator is connected to the FPGA fabric to provide a system reference clock An on...

Page 19: ...n of a full reset of the chip at any time The DEVRST_N signal is an active low signal Figure 17 Device Reset 4 12 User Reset As shown in the following figure the user reset SW3 push button is an input...

Page 20: ...HSIO54NB6 Bank 6 LED4 B25 HSIO68NB6 DQS Bank 6 The following figure shows how each user LED interfaces with the PolarFire device see page Figure 19 User LED Interface 4 13 2 Push Button Switches Two p...

Page 21: ...s 8 connections to the PolarFire device The following table lists on board label of these switches the associated PolarFire pin number name and Bank Table 9 DIP Switch Label On Board PolarFire Pin Num...

Page 22: ...for future expansion of interfaces This FMC connector is compliant with the VITA 57 1 specification The PolarFire Bank4 XCVR1 and XCVR3 signals are routed to the FMC connector J14 for user application...

Page 23: ...PolarFire MPF300T FPGA Video Kit 50200872 UG0872 User Guide Revision 1 0 21 Figure 22 Silkscreen Top View The following figure shows the bottom view of the placement of board components...

Page 24: ...PolarFire MPF300T FPGA Video Kit 50200872 UG0872 User Guide Revision 1 0 22 Figure 23 Silkscreen Bottom View...

Page 25: ...y determine suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associated wi...

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