Installation and Operation
©
2006 Microchip Technology Inc.
DS51571B-page 13
2.3.2
Jumper Settings
Figure 2-2 shows the component layout for the MCP212X Developer’s Daughter Board
and the operation of the JMP1/JP6, JMP2 and JMP3/JP7 jumpers. These jumpers
determine the connections between the MCP2120’s RX, TX and 16XCLK signals, as
well as the header’s RX, TX and 16XCLK signals.
FIGURE 2-2:
JMP1/JP6, JMP2 AND JMP3/JP7 CONFIGURATIONS
16XCLK Source
JMP1/JP6 (RX)
RX to H1-RC7 (RXD)
16XCLK is from the
16XCLK is from the
J3-RC2 pin or J3-16X
TX to H1-RC6 (TXD)
RX to H1-RC6 (TXD)
TX to H1-RC7 (RXD)
RX to H2-RG2 (RX2),
TX to H2-RG1 (TX2),
RX to H3-RC7 (RXD), and
RX to H3-RX
TX to H3-RC6 (TXD), and
TX to H3-TX
(DB-9 to PC)
(DB-9 to PC)
Selections
J1-RC2 pin
JMP3/JP7 (TX)
Selections
